soc/intel/common: Move PMC EPOC related code to Intel common code

Move PMC EPOC related code to intel/common/block because it is
generic for most Intel platforms and ADL, TGL & EHL use it.

Add a kconfig 'PMC_EPOC' to guard this common EPOC code.

The PMC EPOC register indicates which external crystal oscillator is
connected to the PCH.  This frequency is important for determining the
IP clock of internal PCH devices.

Signed-off-by: Lean Sheng Tan <lean.sheng.tan@intel.com>
Change-Id: Ib5fd3c4a648964678ee40ed0f60ca10fe7953f56
Reviewed-on: https://review.coreboot.org/c/coreboot/+/55565
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>

3 files changed, 39 insertions, 0 deletions

diff --git a/src/soc/intel/common/block/include/intelblocks/pmclib.h b/src/soc/intel/common/block/include/intelblocks/pmclib.h
index ecc8166fb8..a54ae18a8c 100644
--- a/src/soc/intel/common/block/include/intelblocks/pmclib.h
+++ b/src/soc/intel/common/block/include/intelblocks/pmclib.h
@@ -6,6 +6,28 @@
 #include <device/pci_type.h>
 #include <types.h>
 
+#define PCH_PMC_EPOC			0x18EC
+/* XTAL frequency in bits 21, 20, 17 */
+#define PCH_EPOC_XTAL_FREQ(__epoc)	((((__epoc) >> 19) & 0x6) | ((__epoc) >> 17 & 0x1))
+
+/**
+ * enum pch_pmc_xtal - External crystal oscillator frequency.
+ * @XTAL_24_MHZ: 24 MHz external crystal.
+ * @XTAL_19_2_MHZ: 19.2 MHz external crystal.
+ * @XTAL_38_4_MHZ: 38.4 MHz external crystal.
+ */
+enum pch_pmc_xtal {
+	XTAL_24_MHZ,
+	XTAL_19_2_MHZ,
+	XTAL_38_4_MHZ,
+};
+
+/*
+ * pmc_get_xtal_freq() - Return &enum pch_pmc_xtal corresponding to
+ * frequency of external oscillator.
+ */
+enum pch_pmc_xtal pmc_get_xtal_freq(void);
+
 /* Forward declare the power state struct here */
 struct chipset_power_state;
 
diff --git a/src/soc/intel/common/block/pmc/Kconfig b/src/soc/intel/common/block/pmc/Kconfig
index 8cd26350b7..503e465530 100644
--- a/src/soc/intel/common/block/pmc/Kconfig
+++ b/src/soc/intel/common/block/pmc/Kconfig
@@ -19,6 +19,12 @@ config SOC_INTEL_COMMON_BLOCK_PMC_DISCOVERABLE
 	  Select this on platforms where the PMC device is discoverable
 	  when scanning busses.
 
+config PMC_EPOC
+	bool
+	help
+	  Enable this for PMC devices to perform EPOC (CPU Early Power-on
+	  Configuration) related functions.
+
 endif # SOC_INTEL_COMMON_BLOCK_PMC
 
 config PMC_INVALID_READ_AFTER_WRITE
diff --git a/src/soc/intel/common/block/pmc/pmclib.c b/src/soc/intel/common/block/pmc/pmclib.c
index a5f2dca550..64c25ff5fe 100644
--- a/src/soc/intel/common/block/pmc/pmclib.c
+++ b/src/soc/intel/common/block/pmc/pmclib.c
@@ -2,6 +2,7 @@
 
 #include <acpi/acpi_pm.h>
 #include <arch/io.h>
+#include <assert.h>
 #include <bootmode.h>
 #include <device/mmio.h>
 #include <cbmem.h>
@@ -725,3 +726,13 @@ void pmc_set_acpi_mode(void)
 		apm_control(APM_CNT_ACPI_DISABLE);
 	}
 }
+
+enum pch_pmc_xtal pmc_get_xtal_freq(void)
+{
+	if (!CONFIG(PMC_EPOC))
+		dead_code();
+
+	const uintptr_t pmcbase = soc_read_pmc_base();
+
+	return PCH_EPOC_XTAL_FREQ(read32((uint32_t *)(pmcbase + PCH_PMC_EPOC)));
+}