diff options
author | Tim Wawrzynczak <twawrzynczak@chromium.org> | 2021-02-04 17:04:24 -0700 |
---|---|---|
committer | Patrick Georgi <pgeorgi@google.com> | 2021-05-21 11:22:14 +0000 |
commit | 0dc82cc80b217a066c4f9abd8c2c91abd8ae51f0 (patch) | |
tree | 3672bd0aa15d8a5c19ab28545132474b1755bc76 /src/soc/intel/common/block | |
parent | fae418777d00acb85a4b0977cfe21467df64fdf6 (diff) |
soc/intel/common: Add function to lpc_lib to return PIRQ routing
In order to fill out static entries for a _PRT table for
soc/intel/common, the PIRQ<->IRQ mapping is required. This patch adds
a function lpc_get_pch_pirq_routing() which returns this mapping.
Signed-off-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Change-Id: Ib215fba54573c50a88aa4584442bd8d27ae017be
Reviewed-on: https://review.coreboot.org/c/coreboot/+/50858
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Diffstat (limited to 'src/soc/intel/common/block')
-rw-r--r-- | src/soc/intel/common/block/include/intelblocks/itss.h | 6 | ||||
-rw-r--r-- | src/soc/intel/common/block/include/intelblocks/lpc_lib.h | 2 | ||||
-rw-r--r-- | src/soc/intel/common/block/itss/itss.c | 5 | ||||
-rw-r--r-- | src/soc/intel/common/block/lpc/lpc_lib.c | 29 |
4 files changed, 24 insertions, 18 deletions
diff --git a/src/soc/intel/common/block/include/intelblocks/itss.h b/src/soc/intel/common/block/include/intelblocks/itss.h index ade9756b6b..286304c031 100644 --- a/src/soc/intel/common/block/include/intelblocks/itss.h +++ b/src/soc/intel/common/block/include/intelblocks/itss.h @@ -3,9 +3,6 @@ #ifndef SOC_INTEL_COMMON_BLOCK_ITSS_H #define SOC_INTEL_COMMON_BLOCK_ITSS_H -/* Max PXRC registers in ITSS*/ -#define MAX_PXRC_CONFIG (PCR_ITSS_PIRQH_ROUT - PCR_ITSS_PIRQA_ROUT + 1) - /* PIRQA Routing Control Register*/ #define PCR_ITSS_PIRQA_ROUT 0x3100 /* PIRQB Routing Control Register*/ @@ -29,6 +26,7 @@ #if !defined(__ACPI__) +#include <southbridge/intel/common/acpi_pirq_gen.h> #include <stdint.h> /* Set the interrupt polarity for provided IRQ to the APIC. */ @@ -38,7 +36,7 @@ void itss_set_irq_polarity(int irq, int active_low); void itss_snapshot_irq_polarities(int start, int end); void itss_restore_irq_polarities(int start, int end); -void itss_irq_init(uint8_t pch_interrupt_routing[MAX_PXRC_CONFIG]); +void itss_irq_init(const uint8_t pch_interrupt_routing[PIRQ_COUNT]); void itss_clock_gate_8254(void); #endif /* !defined(__ACPI__) */ diff --git a/src/soc/intel/common/block/include/intelblocks/lpc_lib.h b/src/soc/intel/common/block/include/intelblocks/lpc_lib.h index c22eea3ad0..43a30010d3 100644 --- a/src/soc/intel/common/block/include/intelblocks/lpc_lib.h +++ b/src/soc/intel/common/block/include/intelblocks/lpc_lib.h @@ -105,5 +105,5 @@ void pch_misc_init(void); unsigned long southbridge_write_acpi_tables(const struct device *device, unsigned long current, struct acpi_rsdp *rsdp); - +const uint8_t *lpc_get_pic_pirq_routing(size_t *num); #endif /* _SOC_COMMON_BLOCK_LPC_LIB_H_ */ diff --git a/src/soc/intel/common/block/itss/itss.c b/src/soc/intel/common/block/itss/itss.c index e918651e59..79ed5d0572 100644 --- a/src/soc/intel/common/block/itss/itss.c +++ b/src/soc/intel/common/block/itss/itss.c @@ -7,10 +7,11 @@ #include <intelblocks/pcr.h> #include <soc/itss.h> #include <soc/pcr_ids.h> +#include <southbridge/intel/common/acpi_pirq_gen.h> -void itss_irq_init(uint8_t pch_interrupt_routing[MAX_PXRC_CONFIG]) +void itss_irq_init(const uint8_t pch_interrupt_routing[PIRQ_COUNT]) { - uint32_t regs[MAX_PXRC_CONFIG/sizeof(uint32_t)] = {0}; + uint32_t regs[PIRQ_COUNT/sizeof(uint32_t)] = {0}; uint8_t index, byte; /* Fill in all the PIRx routes into one array. */ diff --git a/src/soc/intel/common/block/lpc/lpc_lib.c b/src/soc/intel/common/block/lpc/lpc_lib.c index 73a472799f..49509409e0 100644 --- a/src/soc/intel/common/block/lpc/lpc_lib.c +++ b/src/soc/intel/common/block/lpc/lpc_lib.c @@ -15,6 +15,7 @@ #include <soc/irq.h> #include <soc/pci_devs.h> #include <soc/pcr_ids.h> +#include <southbridge/intel/common/acpi_pirq_gen.h> uint16_t lpc_enable_fixed_io_ranges(uint16_t io_enables) { @@ -297,6 +298,23 @@ void pch_enable_ioapic(void) io_apic_write((void *)IO_APIC_ADDR, 0x03, 0x01); } +static const uint8_t pch_interrupt_routing[PIRQ_COUNT] = { + [PIRQ_A] = PCH_IRQ11, + [PIRQ_B] = PCH_IRQ10, + [PIRQ_C] = PCH_IRQ11, + [PIRQ_D] = PCH_IRQ11, + [PIRQ_E] = PCH_IRQ11, + [PIRQ_F] = PCH_IRQ11, + [PIRQ_G] = PCH_IRQ11, + [PIRQ_H] = PCH_IRQ11, +}; + +const uint8_t *lpc_get_pic_pirq_routing(size_t *num) +{ + *num = ARRAY_SIZE(pch_interrupt_routing); + return pch_interrupt_routing; +} + /* * PIRQ[n]_ROUT[3:0] - PIRQ Routing Control * 0x00 - 0000 = Reserved @@ -321,17 +339,6 @@ void pch_enable_ioapic(void) void pch_pirq_init(void) { const struct device *irq_dev; - uint8_t pch_interrupt_routing[MAX_PXRC_CONFIG]; - - pch_interrupt_routing[0] = PCH_IRQ11; - pch_interrupt_routing[1] = PCH_IRQ10; - pch_interrupt_routing[2] = PCH_IRQ11; - pch_interrupt_routing[3] = PCH_IRQ11; - pch_interrupt_routing[4] = PCH_IRQ11; - pch_interrupt_routing[5] = PCH_IRQ11; - pch_interrupt_routing[6] = PCH_IRQ11; - pch_interrupt_routing[7] = PCH_IRQ11; - itss_irq_init(pch_interrupt_routing); for (irq_dev = all_devices; irq_dev; irq_dev = irq_dev->next) { |