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authorHannah Williams <hannah.williams@intel.com>2017-08-29 16:46:35 -0700
committerAaron Durbin <adurbin@chromium.org>2017-09-05 00:43:23 +0000
commit0805a7e66a50ff07a48dec2400e8c8296f42c53f (patch)
treeaa03c515d3155d1b77059d9e7811d83e5c2daebe /src/soc/intel/common/block
parent4c17098fafddefbaa1e7ff5c5ceb5028aa127f00 (diff)
soc/intel/common/block/gpio: Fix PAD_DW1_MASK
for case CONFIG_SOC_INTEL_COMMON_BLOCK_GPIO_PADCFG_PADTOL=y https://ticket.coreboot.org/issues/128 Signed-off-by: Hannah Williams <hannah.williams@intel.com> Change-Id: I2b0b9c07ebc99f4b4d7e8c5a72483bedd33e2e07 Reviewed-on: https://review.coreboot.org/21282 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Youness Alaoui <snifikino@gmail.com> Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Diffstat (limited to 'src/soc/intel/common/block')
-rw-r--r--src/soc/intel/common/block/gpio/gpio.c7
1 files changed, 7 insertions, 0 deletions
diff --git a/src/soc/intel/common/block/gpio/gpio.c b/src/soc/intel/common/block/gpio/gpio.c
index f77f88f3e0..6b6395544e 100644
--- a/src/soc/intel/common/block/gpio/gpio.c
+++ b/src/soc/intel/common/block/gpio/gpio.c
@@ -36,9 +36,16 @@
PAD_CFG0_TRIG_MASK | PAD_CFG0_RXRAW1_MASK | \
PAD_CFG0_RXPADSTSEL_MASK | PAD_CFG0_RESET_MASK)
+#if IS_ENABLED(CONFIG_SOC_INTEL_COMMON_BLOCK_GPIO_PADCFG_PADTOL)
#define PAD_DW1_MASK (PAD_CFG1_IOSTERM_MASK | \
PAD_CFG1_PULL_MASK | \
+ PAD_CFG1_TOL_MASK | \
PAD_CFG1_IOSSTATE_MASK)
+#else
+#define PAD_DW1_MASK (PAD_CFG1_IOSTERM_MASK | \
+ PAD_CFG1_PULL_MASK | \
+ PAD_CFG1_IOSSTATE_MASK)
+#endif
#define PAD_DW2_MASK (0)
#define PAD_DW3_MASK (0)