diff options
author | Subrata Banik <subrata.banik@intel.com> | 2019-07-03 16:50:17 +0530 |
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committer | Subrata Banik <subrata.banik@intel.com> | 2019-07-09 10:52:33 +0000 |
commit | cb587a2522a9f5b68ee10e70832fa90eb84e6cc2 (patch) | |
tree | 734658baeb0dc60455a8cf1c4c37c698d9bac15d /src/soc/intel/common/block | |
parent | df29d23ee3f36d3d6a5fa0fde46beeb67554a8da (diff) |
drivers/intel: Move FSP stage_cache implementation into common block
Change-Id: Iebb6d698c236a95162b3c7eb07987483a293b50a
Signed-off-by: Subrata Banik <subrata.banik@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/34005
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Furquan Shaikh <furquan@google.com>
Diffstat (limited to 'src/soc/intel/common/block')
-rw-r--r-- | src/soc/intel/common/block/smm/smm.c | 13 |
1 files changed, 13 insertions, 0 deletions
diff --git a/src/soc/intel/common/block/smm/smm.c b/src/soc/intel/common/block/smm/smm.c index 75b933e0e9..a2a7c164c8 100644 --- a/src/soc/intel/common/block/smm/smm.c +++ b/src/soc/intel/common/block/smm/smm.c @@ -18,10 +18,23 @@ #include <bootstate.h> #include <console/console.h> #include <cpu/x86/smm.h> +#include <fsp/memmap.h> #include <intelblocks/pmclib.h> #include <intelblocks/smm.h> #include <intelblocks/systemagent.h> #include <soc/pm.h> +#include <stage_cache.h> + +#if !CONFIG(PLATFORM_USES_FSP1_1) +void stage_cache_external_region(void **base, size_t *size) +{ + if (smm_subregion(SMM_SUBREGION_CACHE, base, size)) { + printk(BIOS_ERR, "ERROR: No cache SMM subregion.\n"); + *base = NULL; + *size = 0; + } +} +#endif void smm_southbridge_clear_state(void) { |