diff options
| author | Furquan Shaikh <furquan@chromium.org> | 2017-10-11 14:44:29 -0700 |
|---|---|---|
| committer | Furquan Shaikh <furquan@google.com> | 2017-10-12 22:13:39 +0000 |
| commit | c4e652ff572d7eea3bbbae21825d0085e294cb98 (patch) | |
| tree | 7a9a5ad7d0374742bb7ac091dc4f2814795e47ad /src/soc/intel/common/block/smm | |
| parent | bbd5ee4187dd5b85a8ccf6de28b24a70c0343174 (diff) | |
soc/intel/common: Clean up PMC library GPE handling API
1. Update gpe handling function names to explicitly mention if they
are operating on:
a. STD GPE events
b. GPIO GPE events
c. Both
2. Update comment block in pmclib.h to use generic names for STD and
GPIO GPE registers instead of using any one platform specific names.
BUG=b:67712608
Change-Id: I03349fe85ac31d4215418b884afd8c4b531e68d3
Signed-off-by: Furquan Shaikh <furquan@chromium.org>
Reviewed-on: https://review.coreboot.org/21968
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc/intel/common/block/smm')
| -rw-r--r-- | src/soc/intel/common/block/smm/smihandler.c | 7 | ||||
| -rw-r--r-- | src/soc/intel/common/block/smm/smm.c | 4 |
2 files changed, 4 insertions, 7 deletions
diff --git a/src/soc/intel/common/block/smm/smihandler.c b/src/soc/intel/common/block/smm/smihandler.c index 3f1f490861..7821dbaddc 100644 --- a/src/soc/intel/common/block/smm/smihandler.c +++ b/src/soc/intel/common/block/smm/smihandler.c @@ -151,7 +151,7 @@ void smihandler_southbridge_sleep( elog_add_event_byte(ELOG_TYPE_ACPI_ENTER, slp_typ); /* Clear pending GPE events */ - pmc_clear_gpe_status(); + pmc_clear_all_gpe_status(); /* Next, do the deed. */ @@ -183,9 +183,6 @@ void smihandler_southbridge_sleep( break; } - /* Clear the gpio gpe0 status bits in ACPI registers */ - pmc_clear_gpi_gpe_sts(); - /* Tri-state specific GPIOS to avoid leakage during S3/S5 */ /* @@ -328,7 +325,7 @@ void smihandler_southbridge_pm1( void smihandler_southbridge_gpe0( const struct smm_save_state_ops *save_state_ops) { - pmc_clear_gpe_status(); + pmc_clear_all_gpe_status(); } void smihandler_southbridge_tco( diff --git a/src/soc/intel/common/block/smm/smm.c b/src/soc/intel/common/block/smm/smm.c index 8428fca2c7..d5f42a76e6 100644 --- a/src/soc/intel/common/block/smm/smm.c +++ b/src/soc/intel/common/block/smm/smm.c @@ -35,7 +35,7 @@ void smm_southbridge_clear_state(void) pmc_clear_smi_status(); pmc_clear_pm1_status(); pmc_clear_tco_status(); - pmc_clear_gpe_status(); + pmc_clear_all_gpe_status(); } void smm_southbridge_enable(void) @@ -43,7 +43,7 @@ void smm_southbridge_enable(void) printk(BIOS_DEBUG, "Enabling SMIs.\n"); /* Configure events */ pmc_enable_pm1(PWRBTN_EN | GBL_EN); - pmc_disable_gpe(PME_B0_EN); + pmc_disable_std_gpe(PME_B0_EN); /* * Enable SMI generation: |