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authorFurquan Shaikh <furquan@chromium.org>2017-10-11 14:44:29 -0700
committerFurquan Shaikh <furquan@google.com>2017-10-12 22:13:39 +0000
commitc4e652ff572d7eea3bbbae21825d0085e294cb98 (patch)
tree7a9a5ad7d0374742bb7ac091dc4f2814795e47ad /src/soc/intel/common/block/smm/smm.c
parentbbd5ee4187dd5b85a8ccf6de28b24a70c0343174 (diff)
soc/intel/common: Clean up PMC library GPE handling API
1. Update gpe handling function names to explicitly mention if they are operating on: a. STD GPE events b. GPIO GPE events c. Both 2. Update comment block in pmclib.h to use generic names for STD and GPIO GPE registers instead of using any one platform specific names. BUG=b:67712608 Change-Id: I03349fe85ac31d4215418b884afd8c4b531e68d3 Signed-off-by: Furquan Shaikh <furquan@chromium.org> Reviewed-on: https://review.coreboot.org/21968 Reviewed-by: Aaron Durbin <adurbin@chromium.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc/intel/common/block/smm/smm.c')
-rw-r--r--src/soc/intel/common/block/smm/smm.c4
1 files changed, 2 insertions, 2 deletions
diff --git a/src/soc/intel/common/block/smm/smm.c b/src/soc/intel/common/block/smm/smm.c
index 8428fca2c7..d5f42a76e6 100644
--- a/src/soc/intel/common/block/smm/smm.c
+++ b/src/soc/intel/common/block/smm/smm.c
@@ -35,7 +35,7 @@ void smm_southbridge_clear_state(void)
pmc_clear_smi_status();
pmc_clear_pm1_status();
pmc_clear_tco_status();
- pmc_clear_gpe_status();
+ pmc_clear_all_gpe_status();
}
void smm_southbridge_enable(void)
@@ -43,7 +43,7 @@ void smm_southbridge_enable(void)
printk(BIOS_DEBUG, "Enabling SMIs.\n");
/* Configure events */
pmc_enable_pm1(PWRBTN_EN | GBL_EN);
- pmc_disable_gpe(PME_B0_EN);
+ pmc_disable_std_gpe(PME_B0_EN);
/*
* Enable SMI generation: