diff options
author | Subrata Banik <subrata.banik@intel.com> | 2020-05-31 10:13:04 +0530 |
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committer | Michael Niewöhner <c0d3z3r0@review.coreboot.org> | 2020-06-02 20:43:34 +0000 |
commit | ebeaad9298f5b8df022ac77089a5c15dac6e069a (patch) | |
tree | 607a51ce5ee4ea3b5b5c48928dae0e57703ba489 /src/soc/intel/common/block/sata/sata.c | |
parent | b1c53fc94a05ace5316395cb528567fc92747495 (diff) |
soc/intel/common/{pch,sata}: Remove SATA common code driver
Right now all FSP2.0 based IA platform doesn't need this driver anymore
hence removing to avoid debug and maintenance effort.
TEST=Verified booting from SATA on SPT/CNP/ICP/TGP PCH platforms.
Change-Id: Ied3832b26ba1fdd4c30fafe8149689a01d302c3e
Signed-off-by: Subrata Banik <subrata.banik@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/41674
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: Michael Niewöhner
Reviewed-by: Nico Huber <nico.h@gmx.de>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc/intel/common/block/sata/sata.c')
-rw-r--r-- | src/soc/intel/common/block/sata/sata.c | 102 |
1 files changed, 0 insertions, 102 deletions
diff --git a/src/soc/intel/common/block/sata/sata.c b/src/soc/intel/common/block/sata/sata.c deleted file mode 100644 index d3f82edbd3..0000000000 --- a/src/soc/intel/common/block/sata/sata.c +++ /dev/null @@ -1,102 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0-only */ - -#include <device/mmio.h> -#include <device/device.h> -#include <device/pci.h> -#include <device/pci_ops.h> -#include <device/pci_def.h> -#include <device/pci_ids.h> -#include <soc/pci_devs.h> - -#define SATA_ABAR_PORT_IMPLEMENTED 0x0c -#define SATA_PCI_CFG_PORT_CTL_STS 0x92 - -static void *sata_get_ahci_bar(struct device *dev) -{ - uintptr_t bar; - - bar = pci_read_config32(dev, PCI_BASE_ADDRESS_5); - return (void *)(bar & ~PCI_BASE_ADDRESS_MEM_ATTR_MASK); -} - -/* - * SATA Port control and Status. By default, the SATA ports are set (by HW) - * to the disabled state (e.g. bits[3:0] == '0') as a result of an initial - * power on reset. When enabled by software as per SATA port mapping, - * the ports can transition between the on, partial and slumber states - * and can detect devices. When disabled, the port is in the off state and - * can't detect any devices. - */ -static void sata_final(struct device *dev) -{ - void *ahcibar = sata_get_ahci_bar(dev); - u8 port_impl, temp; - - /* Set Bus Master */ - pci_or_config16(dev, PCI_COMMAND, PCI_COMMAND_MASTER); - - /* Read Ports Implemented (GHC_PI) */ - port_impl = read8(ahcibar + SATA_ABAR_PORT_IMPLEMENTED); - - if (CONFIG(SOC_AHCI_PORT_IMPLEMENTED_INVERT)) - port_impl = ~port_impl; - - port_impl &= 0x07; /* bit 0-2 */ - - /* Port enable */ - temp = pci_read_config8(dev, SATA_PCI_CFG_PORT_CTL_STS); - temp |= port_impl; - pci_write_config8(dev, SATA_PCI_CFG_PORT_CTL_STS, temp); -} - -static struct device_operations sata_ops = { - .read_resources = pci_dev_read_resources, - .set_resources = pci_dev_set_resources, - .enable_resources = pci_dev_enable_resources, - .final = sata_final, - .ops_pci = &pci_dev_ops_pci, -}; - -static const unsigned short pci_device_ids[] = { - PCI_DEVICE_ID_INTEL_SPT_U_SATA, - PCI_DEVICE_ID_INTEL_SPT_U_Y_PREMIUM_SATA, - PCI_DEVICE_ID_INTEL_SPT_KBL_SATA, - PCI_DEVICE_ID_INTEL_LWB_SATA_AHCI, - PCI_DEVICE_ID_INTEL_LWB_SSATA_AHCI, - PCI_DEVICE_ID_INTEL_LWB_SATA_RAID, - PCI_DEVICE_ID_INTEL_LWB_SSATA_RAID, - PCI_DEVICE_ID_INTEL_LWB_SATA_AHCI_SUPER, - PCI_DEVICE_ID_INTEL_LWB_SSATA_AHCI_SUPER, - PCI_DEVICE_ID_INTEL_LWB_SATA_RAID_SUPER, - PCI_DEVICE_ID_INTEL_LWB_SSATA_RAID_SUPER, - PCI_DEVICE_ID_INTEL_LWB_SATA_ALT, - PCI_DEVICE_ID_INTEL_LWB_SATA_ALT_RST, - PCI_DEVICE_ID_INTEL_LWB_SSATA_ALT, - PCI_DEVICE_ID_INTEL_LWB_SSATA_ALT_RST, - PCI_DEVICE_ID_INTEL_CNL_SATA, - PCI_DEVICE_ID_INTEL_CNL_PREMIUM_SATA, - PCI_DEVICE_ID_INTEL_CNP_CMP_COMPAT_SATA, - PCI_DEVICE_ID_INTEL_CNP_H_SATA, - PCI_DEVICE_ID_INTEL_CNP_LP_SATA, - PCI_DEVICE_ID_INTEL_ICP_U_SATA, - PCI_DEVICE_ID_INTEL_CMP_SATA, - PCI_DEVICE_ID_INTEL_CMP_PREMIUM_SATA, - PCI_DEVICE_ID_INTEL_CMP_LP_SATA, - PCI_DEVICE_ID_INTEL_CMP_H_SATA, - PCI_DEVICE_ID_INTEL_CMP_H_HALO_SATA, - PCI_DEVICE_ID_INTEL_CMP_H_PREMIUM_SATA, - PCI_DEVICE_ID_INTEL_TGP_LP_SATA, - PCI_DEVICE_ID_INTEL_TGP_SATA, - PCI_DEVICE_ID_INTEL_TGP_PREMIUM_SATA, - PCI_DEVICE_ID_INTEL_TGP_COMPAT_SATA, - PCI_DEVICE_ID_INTEL_MCC_AHCI_SATA, - PCI_DEVICE_ID_INTEL_JSP_SATA_1, - PCI_DEVICE_ID_INTEL_JSP_SATA_2, - 0 -}; - -static const struct pci_driver pch_sata __pci_driver = { - .ops = &sata_ops, - .vendor = PCI_VENDOR_ID_INTEL, - .devices = pci_device_ids, -}; |