soc/intel/lpc_lib: mirror LPC registers to DMI when required

Starting with SPT, LPC registers IOD, IOE, LGIR* and LGMR need to be
mirrored to their corresponding DMI registers. Add the required writes
to DMI registers, where the PCI config registers get written.

This is already done in soc code for IOD, IOE and LGIR* by mirroring
the registers later, during PCH init. Also the code mostly matches
accross the platforms. This common implementation will avoid delayed
mirroring of the registers and also deduplicate the code.

This change also adds a new Kconfig that will be selected by platforms
requiring mirroring of LPC IO/MMIO registers to their corresponding DMI
registers.

For making use of this common code, the redundant soc code needs to be
dropped and the newly introduced Kconfig option has to be selected. This
is done in the follow-up change.

Change-Id: I39f3bf4c486a1bbc112b2b453381de6da4bbac4d
Signed-off-by: Michael Niewöhner <foss@mniewoehner.de>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/49592
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Nico Huber <nico.h@gmx.de>

1 files changed, 7 insertions, 0 deletions

diff --git a/src/soc/intel/common/block/lpc/Kconfig b/src/soc/intel/common/block/lpc/Kconfig
index 41e72c474a..d76620af6f 100644
--- a/src/soc/intel/common/block/lpc/Kconfig
+++ b/src/soc/intel/common/block/lpc/Kconfig
@@ -11,3 +11,10 @@ config SOC_INTEL_COMMON_BLOCK_LPC_COMB_ENABLE
 	help
 	  By default COMA range to LPC is enable. COMB range to LPC is optional
 	  and should select based on platform dedicated selection.
+
+config SOC_INTEL_COMMON_BLOCK_LPC_MIRROR_TO_DMI
+	bool
+	depends on SOC_INTEL_COMMON_BLOCK_DMI
+	help
+	  Mirror LPC registers for IO/MMIO to their corresponding DMI registers.
+	  Required for platforms starting from SPT.