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authorMarshall Dawson <marshalldawson3rd@gmail.com>2017-07-18 15:37:36 -0600
committerMartin Roth <martinroth@google.com>2017-07-25 17:49:03 +0000
commite4ff2b75fa54e12a3c5a5cc26bf7ddcba49c1698 (patch)
tree74ea583c28ada9ddf53c9db7908bde4fb1f3bcfc /src/soc/intel/common/block/itss
parente5c8077c94813fd5003cc62a246f9d2f35f717fc (diff)
amd/gardenia: Correct PCIe port settings
Fix the OEM settings for two ports. Fix and clarify comments to reflect Rev. B of the board design. Change-Id: I2812ea5945f67229872e78041c771606047bbbec Signed-off-by: Marshall Dawson <marshalldawson3rd@gmail.com> Reviewed-on: https://review.coreboot.org/20744 Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc/intel/common/block/itss')
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