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author | Furquan Shaikh <furquan@google.com> | 2018-06-26 17:53:59 -0700 |
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committer | Furquan Shaikh <furquan@google.com> | 2018-06-28 04:59:53 +0000 |
commit | 344ed02a74f0a3a5e4db087e989de36eaaa5218c (patch) | |
tree | 3a487b52f8f1c6e1e0b486cd99f56c91ff306091 /src/soc/intel/common/block/include | |
parent | e18e5ab5fa5002f5835a2b83be0fcd6c5739cd8a (diff) |
soc/intel/apollolake: Remove call to pmc_fixup_power_state
On APL, call to pmc_fixup_power_state was added because GPE0_EN
registers did not have the right bits set on resume from S3 -- this
was a result of GPE_CFG registers getting reset to their default state
on resume. GPE_CFG registers are programmed as part of pmc_gpe_init
which was previously done only in ramstage.
However, with change a673d1c (soc/intel/apollolake: Initialize GPEs in
bootblock), call to pmc_gpe_init was added to bootblock which means
that GPE_CFG registers will have the right state by the time control
reaches romstage where pmc_fill_power_state is called. Thus, call to
pmc_fixup_power_state is totally redundant and in fact leads to
side-effects because of the call to pmc_disable_all_gpe at the end of
pmc_fill_power_state.
BUG=b:110836465
TEST=Verified on yorp that wake source is correctly identified on
resume from S3.
Change-Id: Ia63ddbe381ce8a59736c231d745fd71d008d5d92
Signed-off-by: Furquan Shaikh <furquan@google.com>
Reviewed-on: https://review.coreboot.org/27249
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Diffstat (limited to 'src/soc/intel/common/block/include')
0 files changed, 0 insertions, 0 deletions