diff options
| author | Michael Niewöhner <foss@mniewoehner.de> | 2020-10-19 12:31:21 +0200 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2020-10-21 07:16:01 +0000 |
| commit | f50ea988b09e7201e129848ab64e6e0e69bf56c4 (patch) | |
| tree | e7cf17631d7c3cd41fa3c68a4c578d4ee7e36b8a /src/soc/intel/common/block/include | |
| parent | dadcbfbe8c682c89b277fdbdfdd26cabd15fc20a (diff) | |
soc/intel,mb/*: get rid of legacy pad macros
Get rid of legacy pad macros by replacing them with their newer
equivalents.
TEST: TIMELESS-built board images match
Change-Id: I078f9bb3c78f642afc6dcfd64d77be823a4485c2
Signed-off-by: Michael Niewöhner <foss@mniewoehner.de>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/46567
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Frans Hendriks <fhendriks@eltan.com>
Reviewed-by: Furquan Shaikh <furquan@google.com>
Diffstat (limited to 'src/soc/intel/common/block/include')
| -rw-r--r-- | src/soc/intel/common/block/include/intelblocks/gpio_defs.h | 28 |
1 files changed, 0 insertions, 28 deletions
diff --git a/src/soc/intel/common/block/include/intelblocks/gpio_defs.h b/src/soc/intel/common/block/include/intelblocks/gpio_defs.h index 31bbde0ce2..422720b921 100644 --- a/src/soc/intel/common/block/include/intelblocks/gpio_defs.h +++ b/src/soc/intel/common/block/include/intelblocks/gpio_defs.h @@ -302,40 +302,12 @@ PAD_TRIG(OFF) | PAD_BUF(TX_RX_DISABLE), \ PAD_PULL(pull) | PAD_IOSSTATE(TxDRxE)) -#if CONFIG(SOC_INTEL_COMMON_BLOCK_GPIO_LEGACY_MACROS) - -#define PAD_CFG_GPI_APIC(pad, pull, rst) \ - _PAD_CFG_STRUCT(pad, \ - PAD_FUNC(GPIO) | PAD_RESET(rst) | PAD_BUF(TX_DISABLE) | \ - PAD_IRQ_CFG(IOAPIC, LEVEL, NONE), PAD_PULL(pull)) - -#define PAD_CFG_GPI_APIC_INVERT(pad, pull, rst) \ - _PAD_CFG_STRUCT(pad, \ - PAD_FUNC(GPIO) | PAD_RESET(rst) | PAD_BUF(TX_DISABLE) | \ - PAD_IRQ_CFG(IOAPIC, LEVEL, INVERT), PAD_PULL(pull)) - -#define PAD_CFG_GPI_ACPI_SCI(pad, pull, rst, inv) \ - PAD_CFG_GPI_SCI(pad, pull, rst, EDGE_SINGLE, inv) - -#define PAD_CFG_GPI_ACPI_SMI(pad, pull, rst, inv) \ - PAD_CFG_GPI_SMI(pad, pull, rst, EDGE_SINGLE, inv) - -#define PAD_CFG_NC(pad) PAD_NC(pad, NONE) - -#define PAD_CFG1_PULL_20K_PU PAD_CFG1_PULL_UP_20K -#define PAD_CFG1_PULL_5K_PU PAD_CFG1_PULL_UP_5K -#define PAD_CFG1_PULL_20K_PD PAD_CFG1_PULL_DN_20K -#define PAD_CFG0_TRIG_EDGE PAD_CFG0_TRIG_EDGE_SINGLE -#define PAD_CFG0_RX_POL_YES PAD_CFG0_RX_POL_INVERT - -#else /* General purpose input, routed to APIC */ #define PAD_CFG_GPI_APIC(pad, pull, rst, trig, inv) \ _PAD_CFG_STRUCT(pad, \ PAD_FUNC(GPIO) | PAD_RESET(rst) | PAD_BUF(TX_DISABLE) | \ PAD_IRQ_CFG(IOAPIC, trig, inv), PAD_PULL(pull) | \ PAD_IOSSTATE(TxDRxE)) -#endif /* General purpose input, routed to APIC - with IOStandby Config*/ #define PAD_CFG_GPI_APIC_IOS(pad, pull, rst, trig, inv, iosstate, iosterm) \ |