soc/intel: Remove duplicate call to acpi_wake_source()

With SOC_INTEL_COMMON_BLOCK_ACPI=y the call was made twice,
possibly in the order:

  common/block/acpi.c: acpi_wake_source()
  common/acpi_wake_source.c: acpi_wake_source()

In this order later call would reset pm1i and gpei in GNVS.

Remove the implementation in block/acpi.c and rename existing
acpi_wake_source.c to block/acpi_wake_source.c.

Change-Id: I74fdae63111e3ea09000d888a918ebe70d711801
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/49880
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>

1 files changed, 19 insertions, 0 deletions

diff --git a/src/soc/intel/common/block/include/intelblocks/acpi_wake_source.h b/src/soc/intel/common/block/include/intelblocks/acpi_wake_source.h
new file mode 100644
index 0000000000..efa0336f47
--- /dev/null
+++ b/src/soc/intel/common/block/include/intelblocks/acpi_wake_source.h
@@ -0,0 +1,19 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+
+#ifndef _INTEL_COMMON_ACPI_H_
+#define _INTEL_COMMON_ACPI_H_
+
+#include <stdint.h>
+
+/*
+ * SOC specific handler to provide the wake source data for ACPI _SWS.
+ *
+ * @pm1:  PM1_STS register with only enabled events set
+ * @gpe0: GPE0_STS registers with only enabled events set
+ *
+ * return the number of registers in the gpe0 array or -1 if nothing
+ * is provided by this function.
+ */
+int soc_fill_acpi_wake(const struct chipset_power_state *ps, uint32_t *pm1, uint32_t **gpe0);
+
+#endif /* _INTEL_COMMON_ACPI_H_ */