diff options
| author | Subrata Banik <subrata.banik@intel.com> | 2017-12-13 11:02:43 +0530 |
|---|---|---|
| committer | Subrata Banik <subrata.banik@intel.com> | 2017-12-21 03:48:00 +0000 |
| commit | 9b98febe7a9126ab4a323c8eeedb1427e959f7d9 (patch) | |
| tree | 9da5751c0215f152dc04f93868a8a189b6ac8630 /src/soc/intel/common/block/include/intelblocks | |
| parent | e5ab9e28a6041209fd88bc7f760df60662539ba1 (diff) | |
soc/intel/common: Add API to restore power failure into PMC common code
PMC config register need to program to define which state system
should be after reapplied power from G3 state.
0 = System will return to S0 state
1 = System will return to S5 state
2 = System will return to previous state before failure
Refer to EDS for detailed programming sequence.
Change-Id: I0ce2cc77745d00a8cfe3eed7c6372af77e063d02
Signed-off-by: Subrata Banik <subrata.banik@intel.com>
Reviewed-on: https://review.coreboot.org/22838
Reviewed-by: Furquan Shaikh <furquan@google.com>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc/intel/common/block/include/intelblocks')
| -rw-r--r-- | src/soc/intel/common/block/include/intelblocks/pmclib.h | 24 |
1 files changed, 24 insertions, 0 deletions
diff --git a/src/soc/intel/common/block/include/intelblocks/pmclib.h b/src/soc/intel/common/block/include/intelblocks/pmclib.h index a045bbea58..3827cf511a 100644 --- a/src/soc/intel/common/block/include/intelblocks/pmclib.h +++ b/src/soc/intel/common/block/include/intelblocks/pmclib.h @@ -133,6 +133,12 @@ void pmc_clear_all_gpe_status(void); void pmc_clear_prsts(void); /* + * Set PMC register to know which state system should be after + * power reapplied + */ +void pmc_soc_restore_power_failure(void); + +/* * Enable or disable global reset. If global reset is enabled, hard reset and * soft reset will trigger global reset, where both host and TXE are reset. * This is cleared on cold boot, hard reset, soft reset and Sx. @@ -205,4 +211,22 @@ void soc_get_gpi_gpe_configs(uint8_t *dw0, uint8_t *dw1, uint8_t *dw2); */ void soc_fill_power_state(struct chipset_power_state *ps); +/* + * Which state do we want to goto after g3 (power restored)? + * 0 == S5 Soft Off + * 1 == S0 Full On + * 2 == Keep Previous State + */ +enum { + MAINBOARD_POWER_STATE_OFF, + MAINBOARD_POWER_STATE_ON, + MAINBOARD_POWER_STATE_PREVIOUS, +}; + +/* + * Determines what state to go to when power is reapplied + * after a power failure (G3 State) + */ +int pmc_get_mainboard_power_failure_state_choice(void); + #endif /* SOC_INTEL_COMMON_BLOCK_PMCLIB_H */ |