diff options
| author | Subrata Banik <subrata.banik@intel.com> | 2020-09-29 14:28:09 +0530 |
|---|---|---|
| committer | Subrata Banik <subrata.banik@intel.com> | 2020-10-03 04:18:46 +0000 |
| commit | 78463a7d26506d6e38917e9bf98ac0dd82663565 (patch) | |
| tree | 015c8c8ed87f030ecac790f29431b9cb7d89e8c5 /src/soc/intel/common/block/include/intelblocks | |
| parent | 1366e4438d07c2de905454421e18d1e5f68de47d (diff) | |
soc/intel: Move soc_pch_pirq_init() to common code
List of changes:
1. Rename soc_pch_pirq_init() as pch_pirq_init() and
move into common block code.
2. Remove redundant LPC functions from SoC directory and
refer from block/lpc directory.
TEST=Able to build and boot hatch and tglrvp platform without seeing
any functional impact.
Change-Id: I856b5ca024e58fd14b4d1721f23d9516a283ebf8
Signed-off-by: Subrata Banik <subrata.banik@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/45809
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Diffstat (limited to 'src/soc/intel/common/block/include/intelblocks')
| -rw-r--r-- | src/soc/intel/common/block/include/intelblocks/lpc_lib.h | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/src/soc/intel/common/block/include/intelblocks/lpc_lib.h b/src/soc/intel/common/block/include/intelblocks/lpc_lib.h index 5bbc384e82..52b0ff8e72 100644 --- a/src/soc/intel/common/block/include/intelblocks/lpc_lib.h +++ b/src/soc/intel/common/block/include/intelblocks/lpc_lib.h @@ -97,8 +97,6 @@ void lpc_disable_clkrun(void); void lpc_io_setup_comm_a_b(void); /* Enable PCH LPC by setting up generic decode range registers. */ void pch_enable_lpc(void); -/* Retrieve and setup SoC specific PCH LPC interrupt routing. */ -void soc_pch_pirq_init(const struct device *dev); /* Get SoC's generic IO decoder range register settings. */ void soc_get_gen_io_dec_range(const struct device *dev, uint32_t gen_io_dec[LPC_NUM_GENERIC_IO_RANGES]); @@ -109,5 +107,7 @@ void pch_lpc_add_new_resource(struct device *dev, uint8_t offset, uintptr_t base, size_t size, unsigned long flags); /* Enable PCH IOAPIC */ void pch_enable_ioapic(void); +/* Retrieve and setup PCH LPC interrupt routing. */ +void pch_pirq_init(void); #endif /* _SOC_COMMON_BLOCK_LPC_LIB_H_ */ |