diff options
| author | Aamir Bohra <aamir.bohra@intel.com> | 2017-03-30 20:12:21 +0530 |
|---|---|---|
| committer | Martin Roth <martinroth@google.com> | 2017-04-11 17:01:46 +0200 |
| commit | 01d75f4172e73fbcdc08ce0a13eaa0efb400ff12 (patch) | |
| tree | 5c6a7c1ab50d5861b772facf7d9c155b51b905fa /src/soc/intel/common/block/include/intelblocks/uart.h | |
| parent | 138b2a03bedb059f7a4064b4ff03d88083774302 (diff) | |
soc/intel/common/block: Add Intel common UART code
Create Intel Common UART driver code. This code does
below UART configuration for bootblock phase.
* Program BAR
* Configure reset register
* Configure clock register
Change-Id: I3843fac88cfb7bbb405be50d69f555b274f0d72a
Signed-off-by: Aamir Bohra <aamir.bohra@intel.com>
Reviewed-on: https://review.coreboot.org/18952
Tested-by: build bot (Jenkins)
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Diffstat (limited to 'src/soc/intel/common/block/include/intelblocks/uart.h')
| -rw-r--r-- | src/soc/intel/common/block/include/intelblocks/uart.h | 24 |
1 files changed, 24 insertions, 0 deletions
diff --git a/src/soc/intel/common/block/include/intelblocks/uart.h b/src/soc/intel/common/block/include/intelblocks/uart.h new file mode 100644 index 0000000000..ed4c7f0127 --- /dev/null +++ b/src/soc/intel/common/block/include/intelblocks/uart.h @@ -0,0 +1,24 @@ +/* + * This file is part of the coreboot project. + * + * Copyright (C) 2017 Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#ifndef SOC_INTEL_COMMON_BLOCK_UART_H +#define SOC_INTEL_COMMON_BLOCK_UART_H + +#include <arch/io.h> + +void uart_common_init(device_t dev, uintptr_t baseaddr, + uint32_t clk_m_val, uint32_t clk_n_val); + +#endif /* SOC_INTEL_COMMON_BLOCK_UART_H */ |