diff options
| author | Lean Sheng Tan <lean.sheng.tan@intel.com> | 2019-05-27 13:06:35 +0800 |
|---|---|---|
| committer | Philipp Deppenwiese <zaolin.daisuki@gmail.com> | 2019-07-17 14:28:41 +0000 |
| commit | 38c3ff7b6ef2875b789d9621363db9165b9a1078 (patch) | |
| tree | f13e8f98cac2ae0e260e2100c94d4f60d1420109 /src/soc/intel/common/block/include/intelblocks/mp_init.h | |
| parent | f2ac0137566076262152f74b6b6761c9f6f2def2 (diff) | |
soc/intel/cannonlake: Add device Ids for new CFL SKUs support
- Add CPU, MCH & IGD IDs for new Coffeelake SKUs
- Add PCH, LPC, SPI IDs for CNP-H PCH CM246 & C246
- Make some minor alignments & naming corrections to align with the rest
TEST= build, boot to both Linux & windows OS on CFL H & S platforms
and verified all the device Id's in serial console logs.
Signed-off-by: Lean Sheng Tan <lean.sheng.tan@intel.com>
Change-Id: I343b11ea8d9c33eb189d7478511a473b145f4ab4
Reviewed-on: https://review.coreboot.org/c/coreboot/+/34157
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Boon Tiong Teo <boon.tiong.teo@intel.com>
Reviewed-by: Nico Huber <nico.h@gmx.de>
Diffstat (limited to 'src/soc/intel/common/block/include/intelblocks/mp_init.h')
| -rw-r--r-- | src/soc/intel/common/block/include/intelblocks/mp_init.h | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/src/soc/intel/common/block/include/intelblocks/mp_init.h b/src/soc/intel/common/block/include/intelblocks/mp_init.h index 0f37a64345..11f1aa652a 100644 --- a/src/soc/intel/common/block/include/intelblocks/mp_init.h +++ b/src/soc/intel/common/block/include/intelblocks/mp_init.h @@ -42,7 +42,8 @@ #define CPUID_WHISKEYLAKE_W0 0x806eb #define CPUID_COFFEELAKE_D0 0x806ea #define CPUID_COFFEELAKE_U0 0x906ea - +#define CPUID_COFFEELAKE_P0 0x906ec +#define CPUID_COFFEELAKE_R0 0x906ed #define CPUID_ICELAKE_A0 0x706e0 #define CPUID_ICELAKE_B0 0x706e1 #define CPUID_COMETLAKE_U_A0 0xa0660 |