diff options
| author | Maulik <maulik.v.vaghela@intel.com> | 2018-01-05 22:40:35 +0530 |
|---|---|---|
| committer | Subrata Banik <subrata.banik@intel.com> | 2018-08-10 06:31:01 +0000 |
| commit | fc19ab5f3465d8f8a861f7492634d0afe847f56d (patch) | |
| tree | 0002bba9ae5cf98224f6defaa677338bffe65662 /src/soc/intel/common/block/include/intelblocks/mp_init.h | |
| parent | e819c857607bb4a1c2911e2073aa588f74789ee1 (diff) | |
src/soc/intel: Add new device IDs to support coffeelake
1. Add new device IDs for SATA, GT and Northbridge to pci_ids.h
2. Add entry to identify CFL U GT and CPU to respective files
3. Add entry to identify CFL U to report_platform.c
BUG=none
BRANCH=none
TEST=Boot to CFL U RVP board with this patch and check if coreboot is
able to enumerate various devices and display correct component names properly
in serial logs.
Change-Id: I47c97fb9eb813587cd655e2bce05a686091619ed
Signed-off-by: Maulik <maulik.v.vaghela@intel.com>
Reviewed-on: https://review.coreboot.org/27522
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-by: Naresh Solanki <naresh.solanki@intel.com>
Reviewed-by: Subrata Banik <subrata.banik@intel.com>
Diffstat (limited to 'src/soc/intel/common/block/include/intelblocks/mp_init.h')
| -rw-r--r-- | src/soc/intel/common/block/include/intelblocks/mp_init.h | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/src/soc/intel/common/block/include/intelblocks/mp_init.h b/src/soc/intel/common/block/include/intelblocks/mp_init.h index 740c2559aa..4ad51d05d8 100644 --- a/src/soc/intel/common/block/include/intelblocks/mp_init.h +++ b/src/soc/intel/common/block/include/intelblocks/mp_init.h @@ -38,6 +38,8 @@ #define CPUID_GLK_A0 0x706a0 #define CPUID_GLK_B0 0x706a1 #define CPUID_WHISKEYLAKE_W0 0x806eb +#define CPUID_COFFEELAKE_D0 0x806ea +#define CPUID_COFFEELAKE_U0 0x906ea /* * MP Init callback function to Find CPU Topology. This function is common |