soc/intel/common/fast_spi: support caching bios in ramstage

After the MTRR solution has been calculated provide a way
for code to call the same function, fast_spi_cache_bios_region(),
in all stages. This is accomplished by using the ramstage
temporary MTRR support.

Change-Id: I84ec90be3a1b0d6ce84d9d8e12adc18148f8fcfb
Signed-off-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: https://review.coreboot.org/20115
Reviewed-by: Furquan Shaikh <furquan@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Barnali Sarkar <barnali.sarkar@intel.com>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>

1 files changed, 3 insertions, 1 deletions

diff --git a/src/soc/intel/common/block/include/intelblocks/fast_spi.h b/src/soc/intel/common/block/include/intelblocks/fast_spi.h
index 6294001d23..b399e4d8fa 100644
--- a/src/soc/intel/common/block/include/intelblocks/fast_spi.h
+++ b/src/soc/intel/common/block/include/intelblocks/fast_spi.h
@@ -57,7 +57,9 @@ void fast_spi_set_strap_msg_data(uint32_t soft_reset_data);
  */
 size_t fast_spi_get_bios_region(size_t *bios_size);
 /*
- * Cache the memory-mapped BIOS region as write-protect type.
+ * Cache the memory-mapped BIOS region as write-protect type. In ramstage
+ * this function needs to be called after the final MTRR solution has been
+ * calculated.
  */
 void fast_spi_cache_bios_region(void);
 /*