diff options
| author | Aaron Durbin <adurbin@chromium.org> | 2018-04-17 11:37:28 -0600 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2018-04-23 09:18:07 +0000 |
| commit | ae18f80febc3ecaacc0314e942a4f8b248bfcc4c (patch) | |
| tree | 0b18a060a00b7ec302e8bcb1fcb0edf166fbad5d /src/soc/intel/common/block/include/intelblocks/cpulib.h | |
| parent | 7f5e73463882a92b64dc9f3ffd72a3bc0762300c (diff) | |
cpu/x86: move NXE and PAT accesses to paging module
The EFER and PAT MSRs are x86 architecturally defined. Therefore,
move the macro defintions to msr.h. Add 'paging' prefix to the
PAT and NXE pae/paging functions to namespace things a little better.
BUG=b:72728953
Change-Id: I1ab2c4ff827e19d5ba4e3b6eaedb3fee6aaef14d
Signed-off-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: https://review.coreboot.org/25713
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Furquan Shaikh <furquan@google.com>
Reviewed-by: Justin TerAvest <teravest@chromium.org>
Diffstat (limited to 'src/soc/intel/common/block/include/intelblocks/cpulib.h')
| -rw-r--r-- | src/soc/intel/common/block/include/intelblocks/cpulib.h | 5 |
1 files changed, 0 insertions, 5 deletions
diff --git a/src/soc/intel/common/block/include/intelblocks/cpulib.h b/src/soc/intel/common/block/include/intelblocks/cpulib.h index 0c7f2c42d3..34caf4c252 100644 --- a/src/soc/intel/common/block/include/intelblocks/cpulib.h +++ b/src/soc/intel/common/block/include/intelblocks/cpulib.h @@ -159,9 +159,4 @@ uint32_t cpu_get_max_turbo_ratio(void); /* Configure Machine Check Architecture support */ void mca_configure(void); -/* Set/Clear NXE bit in IA32_EFER MSR */ -void set_nxe(uint8_t enable); - -/* Set PAT MSR */ -void set_pat(uint64_t pat); #endif /* SOC_INTEL_COMMON_BLOCK_CPULIB_H */ |