diff options
| author | Naresh G Solanki <naresh.solanki@intel.com> | 2018-04-02 21:49:51 +0530 |
|---|---|---|
| committer | Aaron Durbin <adurbin@chromium.org> | 2018-04-09 17:05:59 +0000 |
| commit | b10e96f1969bf7ab1a4c83abc484aa4873af950e (patch) | |
| tree | fd2559bf582cfdc307ce33e03eb715bafe5bbc89 /src/soc/intel/common/block/include/intelblocks/cpulib.h | |
| parent | 68a1542692f5674704ece3c4716924f30947a2a3 (diff) | |
soc/intel/common: Add funtion to modify PAT & NXE bit
Add function to modify NXE bit & PAT.
BUG=None
BRANCH=None
TEST=Make sure build for Glkrvp is successful.
Change-Id: I265d6d5ca538496934a375eb8d99d52879522051
Signed-off-by: Naresh G Solanki <naresh.solanki@intel.com>
Reviewed-on: https://review.coreboot.org/25480
Reviewed-by: Sumeet R Pawnikar <sumeet.r.pawnikar@intel.com>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-by: Subrata Banik <subrata.banik@intel.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc/intel/common/block/include/intelblocks/cpulib.h')
| -rw-r--r-- | src/soc/intel/common/block/include/intelblocks/cpulib.h | 5 |
1 files changed, 5 insertions, 0 deletions
diff --git a/src/soc/intel/common/block/include/intelblocks/cpulib.h b/src/soc/intel/common/block/include/intelblocks/cpulib.h index 34caf4c252..0c7f2c42d3 100644 --- a/src/soc/intel/common/block/include/intelblocks/cpulib.h +++ b/src/soc/intel/common/block/include/intelblocks/cpulib.h @@ -159,4 +159,9 @@ uint32_t cpu_get_max_turbo_ratio(void); /* Configure Machine Check Architecture support */ void mca_configure(void); +/* Set/Clear NXE bit in IA32_EFER MSR */ +void set_nxe(uint8_t enable); + +/* Set PAT MSR */ +void set_pat(uint64_t pat); #endif /* SOC_INTEL_COMMON_BLOCK_CPULIB_H */ |