diff options
| author | Subrata Banik <subrata.banik@intel.com> | 2019-05-15 20:27:04 +0530 |
|---|---|---|
| committer | Subrata Banik <subrata.banik@intel.com> | 2019-06-24 04:33:06 +0000 |
| commit | 42c44c2f8391a3b56acf9215044d2b2787061738 (patch) | |
| tree | 54b57668d334901331c3a48182e59ee29d3ccd75 /src/soc/intel/common/block/fast_spi/fast_spi.c | |
| parent | e56fb89e7c04655ec0fed36484d9e509e08f662f (diff) | |
Replace ENV_RAMSTAGE with ENV_PAYLOAD_LOADER
This patch relying on new rule, ENV_PAYLOAD_LOADER which is set
to ENV_RAMSTAGE.
This approach will help to add future optimization (rampayload) in
coreboot flow if required.
Change-Id: Ib54ece7b9e5f281f8a092dc6f38c07406edfa5fa
Signed-off-by: Subrata Banik <subrata.banik@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/32725
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: ron minnich <rminnich@gmail.com>
Diffstat (limited to 'src/soc/intel/common/block/fast_spi/fast_spi.c')
| -rw-r--r-- | src/soc/intel/common/block/fast_spi/fast_spi.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/src/soc/intel/common/block/fast_spi/fast_spi.c b/src/soc/intel/common/block/fast_spi/fast_spi.c index 58e7db75a1..e40b84493e 100644 --- a/src/soc/intel/common/block/fast_spi/fast_spi.c +++ b/src/soc/intel/common/block/fast_spi/fast_spi.c @@ -249,7 +249,7 @@ void fast_spi_cache_bios_region(void) bios_size = ALIGN_UP(bios_size, alignment); base = 4ULL*GiB - bios_size; - if (ENV_RAMSTAGE) { + if (ENV_PAYLOAD_LOADER) { mtrr_use_temp_range(base, bios_size, type); } else { int mtrr = get_free_var_mtrr(); |