soc/intel/common/fast_spi: Add custom boot media device

This change enables support for a custom boot media device in fast SPI
controller driver if the platform supports additional decode window
for mapping BIOS regions greater than 16MiB. Following new Kconfigs
are added:
1. FAST_SPI_SUPPORTS_EXT_BIOS_WINDOW: SoC can select this to indicate
support for extended BIOS window.
2. EXT_BIOS_WIN_BASE: If FAST_SPI_SUPPORTS_EXT_BIOS_WINDOW is
selected, this provides the base address of the host space that is
reserved for mapping the extended window.
3. EXT_BIOS_WIN_SIZE: If FAST_SPI_SUPPORTS_EXT_BIOS_WINDOW is
selected, this provides the size of the host space reserved for
mapping extended window.

If platform indicates support for extended BIOS decode window,
cbfstool add command is provided additional parameters for the decode
window using --ext-win-base and --ext-win-size.

It is the responsibility of the mainboard fmap author to ensure that
the sections in the BIOS region do not cross 16MiB boundary as the
host space windows are not contiguous. This change adds a build time
check to ensure no sections in FMAP cross the 16MiB boundary.

Even though the platform supports extended window, it depends upon the
size of BIOS region (which in turn depends on SPI flash size) whether
and how much of the additional window is utilized at runtime. This
change also provides helper functions for rest of the coreboot
components to query how much of the extended window is actually
utilized.

BUG=b:171534504

Change-Id: I1b564aed9809cf14b40a3b8e907622266fc782e2
Signed-off-by: Furquan Shaikh <furquan@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/47659
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>

1 files changed, 45 insertions, 0 deletions

diff --git a/src/soc/intel/common/block/fast_spi/Kconfig b/src/soc/intel/common/block/fast_spi/Kconfig
index 936927219d..eb2373ca8b 100644
--- a/src/soc/intel/common/block/fast_spi/Kconfig
+++ b/src/soc/intel/common/block/fast_spi/Kconfig
@@ -11,3 +11,48 @@ config FAST_SPI_DISABLE_WRITE_STATUS
 	default y
 	help
 	  Disable the write status SPI opcode in Intel Fast SPI block.
+
+config FAST_SPI_SUPPORTS_EXT_BIOS_WINDOW
+	bool
+	depends on SOC_INTEL_COMMON_BLOCK_FAST_SPI
+	help
+	  Fast SPI controller on the platform supports additional
+	  window for memory mapping BIOS region (region 1) on the SPI
+	  flash beyond the standard limit of 16MiB. Depending upon the
+	  size of the SPI flash part used by the mainboard, two decode
+	  windows will be enabled:
+	    1. Fixed decode window up to a maximum size of 16MiB under
+	       4G boundary.
+	    2. Extended decode window up to a maximum size provided by
+	       the platform to map the rest of the BIOS region.
+	  SoC selecting this config is expected to provide the base and
+	  maximum size of the extended window in the host address space
+	  using configs EXT_BIOS_WIN_BASE and EXT_BIOS_WIN_SIZE.
+
+config EXT_BIOS_WIN_BASE
+	hex
+	help
+	  If an additional window for mapping BIOS region greater than
+	  16MiB is supported, then this config is used to provide the
+	  base address reserved for the mapping. Since the mapping is
+	  done at the top of the window, depending upon the size of the
+	  BIOS region, the actual base address configured in the fast
+	  SPI controller can be higher at runtime.
+
+config EXT_BIOS_WIN_SIZE
+	hex
+	help
+	  Maximum size of the extended window reserved for mapping BIOS
+	  region greater than 16MiB. The actual mapped window might be
+	  smaller depending upon the size of the BIOS region.
+
+if FAST_SPI_SUPPORTS_EXT_BIOS_WINDOW
+
+# Disable X86_TOP4G_BOOTMEDIA_MAP because the fast SPI controller
+# driver provides a custom boot media device when multiple decode
+# windows are used for the BIOS region.
+
+config X86_TOP4G_BOOTMEDIA_MAP
+	default n
+
+endif