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authorMichael Niewöhner <foss@mniewoehner.de>2021-01-01 21:04:37 +0100
committerPatrick Georgi <pgeorgi@google.com>2021-01-07 08:15:04 +0000
commit6b284569a80f904ed7b813e302ff968bd344c40b (patch)
tree8eebe7a02522c598e67d18da0e37c61dd34a36d6 /src/soc/intel/common/block/cse
parent41a36a3d3ed26a540cacaa0aa39aa7e11a163760 (diff)
cpu/intel: add PC10 residency counter MSR
This MSR will be used in the follow-up changes. Change-Id: Ia6f74861502d4a9f872b2bbbab2e5f1925a14c4d Signed-off-by: Michael Niewöhner <foss@mniewoehner.de> Reviewed-on: https://review.coreboot.org/c/coreboot/+/49044 Reviewed-by: Lance Zhao Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc/intel/common/block/cse')
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