diff options
| author | Andrey Petrov <andrey.petrov@intel.com> | 2017-06-05 13:25:29 -0700 |
|---|---|---|
| committer | Martin Roth <martinroth@google.com> | 2017-07-02 18:50:38 +0000 |
| commit | 0405de978401760df45120600a3bc95c66ae3781 (patch) | |
| tree | bd7bd436c9f55240f6933671d0cc81899972124c /src/soc/intel/common/block/cse/Makefile.inc | |
| parent | 99f50c7465cd6d75a1e5c6c4452136106092cf3c (diff) | |
intel/block/cse: Add Cannon Lake SoC PCI device ID
Change-Id: Ida822d704b04cc4d1dfffb58003fc308bcb502d0
Signed-off-by: Andrey Petrov <andrey.petrov@intel.com>
Reviewed-on: https://review.coreboot.org/20064
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Diffstat (limited to 'src/soc/intel/common/block/cse/Makefile.inc')
| -rw-r--r-- | src/soc/intel/common/block/cse/Makefile.inc | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/src/soc/intel/common/block/cse/Makefile.inc b/src/soc/intel/common/block/cse/Makefile.inc index fe7b13c7bb..376f00f715 100644 --- a/src/soc/intel/common/block/cse/Makefile.inc +++ b/src/soc/intel/common/block/cse/Makefile.inc @@ -1,2 +1,3 @@ +bootblock-$(CONFIG_SOC_INTEL_COMMON_BLOCK_CSE) += cse.c romstage-$(CONFIG_SOC_INTEL_COMMON_BLOCK_CSE) += cse.c ramstage-$(CONFIG_SOC_INTEL_COMMON_BLOCK_CSE) += cse.c |