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authorTan, Lean Sheng <lean.sheng.tan@intel.com>2020-01-20 19:13:56 -0800
committerPatrick Georgi <pgeorgi@google.com>2020-01-22 15:42:26 +0000
commit26136092c01b8d29fde68058597b74923c21a41f (patch)
treea95aa8cd3df3197a72d56e396dfa9fc86fb301fa /src/soc/intel/common/block/cpu
parent8406179eff18144cad3584f28554186baf8e1a37 (diff)
soc/intel/common: Add Elkhartlake Device IDs
Add Elkhartlake CPU, SA and PCH IDs. EHL PCH is code named as MCC. Also add a MCH ID (JSL_EHL) which is shared by both JSL and EHL SKUs. Signed-off-by: Lean Sheng Tan <lean.sheng.tan@intel.com> Change-Id: I03f15832143bcc3095a3936c65fbc30a95e7f0f6 Reviewed-on: https://review.coreboot.org/c/coreboot/+/38489 Reviewed-by: Subrata Banik <subrata.banik@intel.com> Reviewed-by: Ronak Kanabar <ronak.kanabar@intel.com> Reviewed-by: Werner Zeh <werner.zeh@siemens.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc/intel/common/block/cpu')
-rw-r--r--src/soc/intel/common/block/cpu/mp_init.c1
1 files changed, 1 insertions, 0 deletions
diff --git a/src/soc/intel/common/block/cpu/mp_init.c b/src/soc/intel/common/block/cpu/mp_init.c
index 721e42c03c..f3c6c7d573 100644
--- a/src/soc/intel/common/block/cpu/mp_init.c
+++ b/src/soc/intel/common/block/cpu/mp_init.c
@@ -87,6 +87,7 @@ static const struct cpu_device_id cpu_table[] = {
{ X86_VENDOR_INTEL, CPUID_COMETLAKE_H_S_10_2_P0 },
{ X86_VENDOR_INTEL, CPUID_COMETLAKE_H_S_10_2_Q0_P1 },
{ X86_VENDOR_INTEL, CPUID_TIGERLAKE_A0 },
+ { X86_VENDOR_INTEL, CPUID_ELKHARTLAKE_A0 },
{ 0, 0 },
};