diff options
| author | Arthur Heymans <arthur@aheymans.xyz> | 2019-04-14 18:38:35 +0200 |
|---|---|---|
| committer | Martin Roth <martinroth@google.com> | 2019-04-21 23:29:29 +0000 |
| commit | c4772b9fd7fcc29d09d7617dc8cff922118814d7 (patch) | |
| tree | 93087aecbff5988ab88888df0eec86d5fd1d92ed /src/soc/intel/common/block/cpu/Makefile.inc | |
| parent | 0800194f95933d6337ba2e7900a1f02671aed3ba (diff) | |
cpu/x86: Move checking for MTRR's as a proxy for proper CPU reset
Checking for empty MTRR_DEF_TYPE_MSR as a proxy for proper CPU reset
is common across multiple platforms. Therefore place it in a common
location.
Change-Id: I81d82fb9fe27cd9de6085251fe1a5685cdd651fc
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/32319
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Duncan Laurie <dlaurie@chromium.org>
Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-by: Furquan Shaikh <furquan@google.com>
Diffstat (limited to 'src/soc/intel/common/block/cpu/Makefile.inc')
| -rw-r--r-- | src/soc/intel/common/block/cpu/Makefile.inc | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/src/soc/intel/common/block/cpu/Makefile.inc b/src/soc/intel/common/block/cpu/Makefile.inc index 5207227b49..a6c4f37cc4 100644 --- a/src/soc/intel/common/block/cpu/Makefile.inc +++ b/src/soc/intel/common/block/cpu/Makefile.inc @@ -1,4 +1,5 @@ bootblock-$(CONFIG_SOC_INTEL_COMMON_BLOCK_CAR) += car/cache_as_ram.S +bootblock-$(CONFIG_SOC_INTEL_COMMON_BLOCK_CAR) += ../../../../../cpu/x86/early_reset.S bootblock-$(CONFIG_FSP_CAR)+= car/cache_as_ram_fsp.S bootblock-$(CONFIG_SOC_INTEL_COMMON_BLOCK_CPU) += cpulib.c |