diff options
| author | Subrata Banik <subrata.banik@intel.com> | 2017-03-07 14:02:23 +0530 |
|---|---|---|
| committer | Martin Roth <martinroth@google.com> | 2017-03-28 16:38:42 +0200 |
| commit | 03e971cd23e96b9293fc3ecc420f56ad91326cd9 (patch) | |
| tree | 722243549211ec6204f190f1d2c1d825d41aa466 /src/soc/intel/common/block/cpu/Kconfig | |
| parent | 0637e567e13adab5b204a33fc57a54f437761f3f (diff) | |
soc/intel/common/block: Add cache as ram init and teardown code
Create sample model for common car init and teardown programming.
TEST=Booted Reef, KCRD/EVE, GLKRVP with CAR_CQOS, CAR_NEM_ENHANCED
and CAR_NEM configs till post code 0x2a.
Change-Id: Iffd0c3e3ca81a3d283d5f1da115222a222e6b157
Signed-off-by: Subrata Banik <subrata.banik@intel.com>
Reviewed-on: https://review.coreboot.org/18381
Tested-by: build bot (Jenkins)
Reviewed-by: Martin Roth <martinroth@google.com>
Diffstat (limited to 'src/soc/intel/common/block/cpu/Kconfig')
| -rw-r--r-- | src/soc/intel/common/block/cpu/Kconfig | 32 |
1 files changed, 32 insertions, 0 deletions
diff --git a/src/soc/intel/common/block/cpu/Kconfig b/src/soc/intel/common/block/cpu/Kconfig new file mode 100644 index 0000000000..7b78c53ea7 --- /dev/null +++ b/src/soc/intel/common/block/cpu/Kconfig @@ -0,0 +1,32 @@ +config SOC_INTEL_COMMON_BLOCK_CAR + bool + default n + help + This option allows you to select how cache-as-ram (CAR) is set up. + +config INTEL_CAR_NEM + bool + default n + help + Traditionally, CAR is set up by using Non-Evict mode. This method + does not allow CAR and cache to co-exist, because cache fills are + blocked in NEM. + +config INTEL_CAR_CQOS + bool + default n + help + Cache Quality of Service allows more fine-grained control of cache + usage. As result, it is possible to set up a portion of L2 cache for + CAR and use the remainder for actual caching. + +config INTEL_CAR_NEM_ENHANCED + bool + default n + help + A current limitation of NEM (Non-Evict mode) is that code and data sizes + are derived from the requirement to not write out any modified cache line. + With NEM, if there is no physical memory behind the cached area, + the modified data will be lost and NEM results will be inconsistent. + ENHANCED NEM guarantees that modified data is always + kept in cache while clean data is replaced. |