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| author | Kevin Chang <kevin.chang@lcfc.corp-partner.google.com> | 2022-03-18 21:04:07 +0800 |
|---|---|---|
| committer | Tim Wawrzynczak <twawrzynczak@chromium.org> | 2022-03-22 05:01:57 +0000 |
| commit | 6e52c1da4a2245a7499530ea0943fa002ed8aa5e (patch) | |
| tree | 622f2b388eaa2f85136c747191dd4b1462080327 /src/soc/intel/common/basecode | |
| parent | 4b1f25d82f2c5837172446073f4431ca5e0242e1 (diff) | |
soc/intel/{adl,common}: Add ASPM setting in pcie_rp_config
This change provides config for devicetree to control ASPM per port
BUG=b:220079865
TEST=Build FW and run stress exceed 2500 cycles on taeko.
Signed-off-by: Kevin Chang <kevin.chang@lcfc.corp-partner.google.com>
Change-Id: I19b5f3dc8d95e153301d777492c921ce582ba988
Reviewed-on: https://review.coreboot.org/c/coreboot/+/62919
Reviewed-by: Peichao Wang <pwang12@lenovo.corp-partner.google.com>
Reviewed-by: Eric Lai <eric_lai@quanta.corp-partner.google.com>
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Reviewed-by: Martin L Roth <martinroth@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc/intel/common/basecode')
0 files changed, 0 insertions, 0 deletions