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authorAlexey Buyanov <alexey.buyanov@intel.com>2020-06-01 21:41:14 -0700
committerSubrata Banik <subrata.banik@intel.com>2020-06-13 09:03:32 +0000
commit03248033e7be6f81ad5b60ed21a60071aee32c67 (patch)
treeed158e24bf2808c7ed1546418f23754f5857fbfb /src/soc/intel/common/acpi/platform.asl
parente334fea94b126760cf34f93131a884886a6de3a7 (diff)
soc/intel/common: Introduce ASL2.0 syntax
Modify soc/intel/common .asl files to comply with ASL2.0 syntax for better code readability and clarity BUG=none BRANCH=none TEST= Deltan coreboot binary remains the same after the changes are applied Signed-off-by: Alexey Buyanov <alexey.buyanov@intel.com> Change-Id: I8f95cf88f499d9f9bdd8c80c95af52f8fd886cdf Reviewed-on: https://review.coreboot.org/c/coreboot/+/42083 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Subrata Banik <subrata.banik@intel.com> Reviewed-by: V Sowmya <v.sowmya@intel.com> Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Diffstat (limited to 'src/soc/intel/common/acpi/platform.asl')
-rw-r--r--src/soc/intel/common/acpi/platform.asl4
1 files changed, 2 insertions, 2 deletions
diff --git a/src/soc/intel/common/acpi/platform.asl b/src/soc/intel/common/acpi/platform.asl
index 39a7b3a9ef..a973149e6d 100644
--- a/src/soc/intel/common/acpi/platform.asl
+++ b/src/soc/intel/common/acpi/platform.asl
@@ -22,7 +22,7 @@ Field (POST, ByteAcc, Lock, Preserve)
Method (_PTS, 1)
{
- Store (POST_OS_ENTER_PTS, DBG0)
+ DBG0 = POST_OS_ENTER_PTS
If (CondRefOf (\_SB.MPTS))
{
@@ -42,7 +42,7 @@ Method (_PTS, 1)
Method (_WAK, 1)
{
- Store (POST_OS_ENTER_WAKE, DBG0)
+ DBG0 = POST_OS_ENTER_WAKE
If (CondRefOf (\_SB.MWAK))
{