diff options
| author | Alexey Buyanov <alexey.buyanov@intel.com> | 2020-06-01 21:41:14 -0700 |
|---|---|---|
| committer | Subrata Banik <subrata.banik@intel.com> | 2020-06-13 09:03:32 +0000 |
| commit | 03248033e7be6f81ad5b60ed21a60071aee32c67 (patch) | |
| tree | ed158e24bf2808c7ed1546418f23754f5857fbfb /src/soc/intel/common/acpi/pcr.asl | |
| parent | e334fea94b126760cf34f93131a884886a6de3a7 (diff) | |
soc/intel/common: Introduce ASL2.0 syntax
Modify soc/intel/common .asl files to comply with ASL2.0 syntax for
better code readability and clarity
BUG=none
BRANCH=none
TEST= Deltan coreboot binary remains the same after the changes are applied
Signed-off-by: Alexey Buyanov <alexey.buyanov@intel.com>
Change-Id: I8f95cf88f499d9f9bdd8c80c95af52f8fd886cdf
Reviewed-on: https://review.coreboot.org/c/coreboot/+/42083
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Subrata Banik <subrata.banik@intel.com>
Reviewed-by: V Sowmya <v.sowmya@intel.com>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Diffstat (limited to 'src/soc/intel/common/acpi/pcr.asl')
| -rw-r--r-- | src/soc/intel/common/acpi/pcr.asl | 10 |
1 files changed, 5 insertions, 5 deletions
diff --git a/src/soc/intel/common/acpi/pcr.asl b/src/soc/intel/common/acpi/pcr.asl index 71d679ab73..81e496185a 100644 --- a/src/soc/intel/common/acpi/pcr.asl +++ b/src/soc/intel/common/acpi/pcr.asl @@ -19,7 +19,7 @@ Method (PCRB, 1, NotSerialized) */ Method (PCRR, 2, Serialized) { - OperationRegion (PCRD, SystemMemory, Add (PCRB (Arg0), Arg1), 4) + OperationRegion (PCRD, SystemMemory, PCRB (Arg0) + Arg1, 4) Field (PCRD, DWordAcc, NoLock, Preserve) { DATA, 32 @@ -35,12 +35,12 @@ Method (PCRR, 2, Serialized) */ Method (PCRA, 3, Serialized) { - OperationRegion (PCRD, SystemMemory, Add (PCRB (Arg0), Arg1), 4) + OperationRegion (PCRD, SystemMemory, PCRB (Arg0) + Arg1, 4) Field (PCRD, DWordAcc, NoLock, Preserve) { DATA, 32 } - And (DATA, Arg2, DATA) + DATA &= Arg2 /* * After every write one needs to read an innocuous register @@ -59,12 +59,12 @@ Method (PCRA, 3, Serialized) */ Method (PCRO, 3, Serialized) { - OperationRegion (PCRD, SystemMemory, Add (PCRB (Arg0), Arg1), 4) + OperationRegion (PCRD, SystemMemory, PCRB (Arg0) + Arg1, 4) Field (PCRD, DWordAcc, NoLock, Preserve) { DATA, 32 } - Or (DATA, Arg2, DATA) + DATA |= Arg2 /* * After every write one needs to read an innocuous register |