diff options
author | Andrey Petrov <andrey.petrov@intel.com> | 2016-05-13 15:27:42 -0700 |
---|---|---|
committer | Aaron Durbin <adurbin@chromium.org> | 2016-05-18 07:02:43 +0200 |
commit | 060b215fa7b7f9aae04e90be9eeed14e6f1974bf (patch) | |
tree | e7990823c40e39afee031962d8c131f0e9f10ef2 /src/soc/intel/common/Makefile.inc | |
parent | 493ec92eb3c379c127754dd2459563c21d9d6ed9 (diff) |
soc/intel/common: Add utility to load VBT file
Change-Id: I8d3d47ca2fc1fc4c10e61c04b941b6378b9c0f80
Signed-off-by: Andrey Petrov <andrey.petrov@intel.com>
Reviewed-on: https://review.coreboot.org/14815
Tested-by: build bot (Jenkins)
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Diffstat (limited to 'src/soc/intel/common/Makefile.inc')
-rw-r--r-- | src/soc/intel/common/Makefile.inc | 5 |
1 files changed, 5 insertions, 0 deletions
diff --git a/src/soc/intel/common/Makefile.inc b/src/soc/intel/common/Makefile.inc index a7218b71db..8dfd4c0b76 100644 --- a/src/soc/intel/common/Makefile.inc +++ b/src/soc/intel/common/Makefile.inc @@ -14,6 +14,7 @@ ramstage-$(CONFIG_SOC_INTEL_COMMON_RESET) += reset.c ramstage-y += util.c ramstage-$(CONFIG_MMA) += mma.c ramstage-$(CONFIG_SOC_INTEL_COMMON_ACPI_WAKE_SOURCE) += acpi_wake_source.c +ramstage-y += vbt.c # Create and add the MRC cache to the cbfs image ifneq ($(CONFIG_CHROMEOS),y) @@ -71,4 +72,8 @@ $(foreach mma_test, $(MMA_TEST_CONFIG_NAMES),\ endif +cbfs-files-$(CONFIG_ADD_VBT_DATA_FILE) += vbt.bin +vbt.bin-file := $(call strip_quotes,$(CONFIG_VBT_FILE)) +vbt.bin-type := raw + endif |