diff options
| author | Barnali Sarkar <barnali.sarkar@intel.com> | 2017-02-21 16:24:49 +0530 |
|---|---|---|
| committer | Martin Roth <martinroth@google.com> | 2017-03-01 16:32:21 +0100 |
| commit | e13b77564f71dd125f2e4691407ac39efe552b6e (patch) | |
| tree | 6d6e53f9294f39375747b60c196bea71095cfc18 /src/soc/intel/common/Makefile.inc | |
| parent | 9e54978f6ef7c12d6da07f64ad665c0e47deba50 (diff) | |
soc/intel/common: Save Memory DIMM Information in SMBIOS table
Save SMBIOS memory information from FSP MEM_INFO_DATA_HOB in CBMEM.
Add function dimm_info_fill() which populates SMBIOS memory
information from FSP MEM_INFO_DATA_HOB data.
BUG=chrome-os-partner:61729
BRANCH=none
TEST=Build and boot KBLRVP to verify the type 17 DIMM info coming in
SMBIOS table from Kernel command "dmidecode".
Change-Id: I0fd7c9887076d3fdd320fcbdcc873cb1965b950c
Signed-off-by: Barnali Sarkar <barnali.sarkar@intel.com>
Reviewed-on: https://review.coreboot.org/18418
Tested-by: build bot (Jenkins)
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Diffstat (limited to 'src/soc/intel/common/Makefile.inc')
| -rw-r--r-- | src/soc/intel/common/Makefile.inc | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/src/soc/intel/common/Makefile.inc b/src/soc/intel/common/Makefile.inc index d6e1e751d6..25e51cd70b 100644 --- a/src/soc/intel/common/Makefile.inc +++ b/src/soc/intel/common/Makefile.inc @@ -13,6 +13,7 @@ romstage-$(CONFIG_SOC_INTEL_COMMON_LPSS_I2C) += lpss_i2c.c romstage-$(CONFIG_SOC_INTEL_COMMON_RESET) += reset.c romstage-y += util.c romstage-$(CONFIG_MMA) += mma.c +romstage-y += smbios.c postcar-y += util.c postcar-$(CONFIG_SOC_INTEL_COMMON_RESET) += reset.c |