diff options
| author | Hannah Williams <hannah.williams@intel.com> | 2016-05-04 18:15:49 -0700 |
|---|---|---|
| committer | Aaron Durbin <adurbin@chromium.org> | 2016-05-25 19:09:00 +0200 |
| commit | ba0fc470ddf13af322c79bac291ad475331e09a3 (patch) | |
| tree | e5cef37a7421c5322d4dc2375a07385b6ee3b195 /src/soc/intel/common/Makefile.inc | |
| parent | e6dcafbc1a6b3468ae57003dd481b5143970a61c (diff) | |
soc/intel/common: Add common smihandler code
Provide default handler for some SMI events. Provide the framework for
extracting data from SMM Save State area for processors with SMM revision
30100 and 30101.
The SOC specific code should initialize southbridge_smi with event
handlers. For SMM Save state handling, SOC code should implement
get_smm_save_state_ops which initializes the SOC specific ops for SMM Save
State handling.
Change-Id: I0aefb6dbb2b1cac5961f9e43f4752b5929235df3
Signed-off-by: Hannah Williams <hannah.williams@intel.com>
Reviewed-on: https://review.coreboot.org/14615
Tested-by: build bot (Jenkins)
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Diffstat (limited to 'src/soc/intel/common/Makefile.inc')
| -rw-r--r-- | src/soc/intel/common/Makefile.inc | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/src/soc/intel/common/Makefile.inc b/src/soc/intel/common/Makefile.inc index a70da04e4e..deda50a4f2 100644 --- a/src/soc/intel/common/Makefile.inc +++ b/src/soc/intel/common/Makefile.inc @@ -17,6 +17,8 @@ ramstage-$(CONFIG_SOC_INTEL_COMMON_ACPI_WAKE_SOURCE) += acpi_wake_source.c ramstage-y += vbt.c ramstage-$(CONFIG_SOC_INTEL_COMMON_GFX_OPREGION) += opregion.c +smm-$(CONFIG_SOC_INTEL_COMMON_SMI) += smihandler.c + # Create and add the MRC cache to the cbfs image ifneq ($(CONFIG_CHROMEOS),y) $(obj)/mrc.cache: $(obj)/config.h |