aboutsummaryrefslogtreecommitdiff
path: root/src/soc/intel/common/Makefile.inc
diff options
context:
space:
mode:
authorAndrey Petrov <andrey.petrov@intel.com>2016-05-12 19:10:11 -0700
committerAaron Durbin <adurbin@chromium.org>2016-05-18 07:03:13 +0200
commitdc4ae11366eedea20b8b2c530cdd830a3e256ef2 (patch)
tree35ec0aaa46e709ec85e45b51cb1ea074db076ebb /src/soc/intel/common/Makefile.inc
parent060b215fa7b7f9aae04e90be9eeed14e6f1974bf (diff)
soc/intel/common: Add IGD OpRegion support
Add helper function that fills OpRegion structure based on VBT file content and some reasonable defaults. Change-Id: I9aa8862878cc016a9a684c844ceab390734f3e84 Signed-off-by: Andrey Petrov <andrey.petrov@intel.com> Reviewed-on: https://review.coreboot.org/14806 Tested-by: build bot (Jenkins) Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Diffstat (limited to 'src/soc/intel/common/Makefile.inc')
-rw-r--r--src/soc/intel/common/Makefile.inc1
1 files changed, 1 insertions, 0 deletions
diff --git a/src/soc/intel/common/Makefile.inc b/src/soc/intel/common/Makefile.inc
index 8dfd4c0b76..a70da04e4e 100644
--- a/src/soc/intel/common/Makefile.inc
+++ b/src/soc/intel/common/Makefile.inc
@@ -15,6 +15,7 @@ ramstage-y += util.c
ramstage-$(CONFIG_MMA) += mma.c
ramstage-$(CONFIG_SOC_INTEL_COMMON_ACPI_WAKE_SOURCE) += acpi_wake_source.c
ramstage-y += vbt.c
+ramstage-$(CONFIG_SOC_INTEL_COMMON_GFX_OPREGION) += opregion.c
# Create and add the MRC cache to the cbfs image
ifneq ($(CONFIG_CHROMEOS),y)