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authorAaron Durbin <adurbin@chromium.org>2017-12-15 12:26:40 -0700
committerAaron Durbin <adurbin@chromium.org>2017-12-17 18:29:41 +0000
commitdecd062875c1e33d4c9203c2edc0652792a46e73 (patch)
tree83da2b2b82f3e0b5298f89ed2477637ec0766a16 /src/soc/intel/common/Kconfig
parent934f433d87df0440294be6fc2e6395e0139a5e34 (diff)
drivers/mrc_cache: move mrc_cache support to drivers
There's nothing intel-specific about the current mrc_cache support. It's logic manages saving non-volatile areas into the boot media. Therefore, expose it to the rest of the system for any and all to use. BUG=b:69614064 Change-Id: I3b331c82a102f88912a3e10507a70207fb20aecc Signed-off-by: Aaron Durbin <adurbin@chromium.org> Reviewed-on: https://review.coreboot.org/22901 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Furquan Shaikh <furquan@google.com>
Diffstat (limited to 'src/soc/intel/common/Kconfig')
-rw-r--r--src/soc/intel/common/Kconfig32
1 files changed, 0 insertions, 32 deletions
diff --git a/src/soc/intel/common/Kconfig b/src/soc/intel/common/Kconfig
index 18a34b335c..95c09c78c4 100644
--- a/src/soc/intel/common/Kconfig
+++ b/src/soc/intel/common/Kconfig
@@ -8,38 +8,6 @@ if SOC_INTEL_COMMON
comment "Intel SoC Common Code"
source "src/soc/intel/common/block/Kconfig"
-config CACHE_MRC_SETTINGS
- bool "Save cached MRC settings"
- default n
-
-if CACHE_MRC_SETTINGS
-
-config MRC_SETTINGS_CACHE_BASE
- hex
- default 0xfffe0000
-
-config MRC_SETTINGS_CACHE_SIZE
- hex
- default 0x10000
-
-config MRC_SETTINGS_PROTECT
- bool "Enable protection on MRC settings"
- default n
-
-config HAS_RECOVERY_MRC_CACHE
- bool
- default n
-
-config MRC_CLEAR_NORMAL_CACHE_ON_RECOVERY_RETRAIN
- bool
- default n
-
-config MRC_SETTINGS_VARIABLE_DATA
- bool
- default n
-
-endif # CACHE_MRC_SETTINGS
-
config DISPLAY_MTRRS
bool "MTRRs: Display the MTRR settings"
default n