diff options
| author | Aaron Durbin <adurbin@chromium.org> | 2015-08-05 12:26:56 -0500 |
|---|---|---|
| committer | Aaron Durbin <adurbin@chromium.org> | 2015-08-14 15:18:23 +0200 |
| commit | abf87a25f21b22797d8dc8c9a33537980df2c24d (patch) | |
| tree | 40d1849a90a9151b9bc11deac619698f465ba172 /src/soc/intel/common/Kconfig | |
| parent | a0429b6f3ca6aa63124dbbbe3507629adc9ccd23 (diff) | |
intel/common: use external stage cache for fsp_ramstage
The fsp_ramstage.c code was not taking advantage of the stage
cache which does all the accounting and calculation work for
the caller. Remove the open coded logic and use the provided
infrastructure. Using said infrastructure means there's no
need for the FSP_CACHE_SIZE Kconfig variable. Therefore, remove
it.
BUG=chrome-os-partner:43636
BRANCH=None
TEST=Built, booted, suspended, and resumed on glados.
Original-Change-Id: I4363823c825b4a700205769f109ff9cf0d78b897
Original-Signed-off-by: Aaron Durbin <adurbin@chromium.org>
Original-Reviewed-on: https://chromium-review.googlesource.com/290831
Original-Reviewed-by: Leroy P Leahy <leroy.p.leahy@intel.com>
Original-Reviewed-by: Duncan Laurie <dlaurie@chromium.org>
Change-Id: Ifd3cc4a538daac687949c5f4cab2c687368d6787
Signed-off-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: http://review.coreboot.org/11196
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Diffstat (limited to 'src/soc/intel/common/Kconfig')
| -rw-r--r-- | src/soc/intel/common/Kconfig | 9 |
1 files changed, 0 insertions, 9 deletions
diff --git a/src/soc/intel/common/Kconfig b/src/soc/intel/common/Kconfig index dfbc6bb729..ab8c475010 100644 --- a/src/soc/intel/common/Kconfig +++ b/src/soc/intel/common/Kconfig @@ -44,15 +44,6 @@ config DISPLAY_SMM_MEMORY_MAP bool "SMM: Display the SMM memory map" default n -config FSP_CACHE_SIZE - hex "FSP Cache Size in bytes" - default 0 - help - Size of the region in SMM used to cache the FSP binary. This region - size value is used to split the SMM_RESERVED_SIZE config value - into a region specifically for FSP. The remaining region is for - ramstage. - config SOC_INTEL_COMMON_FSP_RAM_INIT bool "FSP: Use the common raminit.c module" default n |