diff options
author | Nico Huber <nico.h@gmx.de> | 2018-10-04 23:42:42 +0200 |
---|---|---|
committer | Nico Huber <nico.h@gmx.de> | 2018-10-08 16:57:27 +0000 |
commit | d44221f9c8f3686e040ff9481829315068b321a3 (patch) | |
tree | 76337bf1cae88feda44e3c63dd7e32e964e8767d /src/soc/intel/cannonlake | |
parent | 834543c0c71544b547194b093b8e1da990722762 (diff) |
Move compiler.h to commonlib
Its spreading copies got out of sync. And as it is not a standard header
but used in commonlib code, it belongs into commonlib. While we are at
it, always include it via GCC's `-include` switch.
Some Windows and BSD quirk handling went into the util copies. We always
guard from redefinitions now to prevent further issues.
Change-Id: I850414e6db1d799dce71ff2dc044e6a000ad2552
Signed-off-by: Nico Huber <nico.h@gmx.de>
Reviewed-on: https://review.coreboot.org/28927
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Diffstat (limited to 'src/soc/intel/cannonlake')
-rw-r--r-- | src/soc/intel/cannonlake/chip.c | 1 | ||||
-rw-r--r-- | src/soc/intel/cannonlake/fsp_params.c | 1 | ||||
-rw-r--r-- | src/soc/intel/cannonlake/include/soc/nvs.h | 1 | ||||
-rw-r--r-- | src/soc/intel/cannonlake/include/soc/pm.h | 1 | ||||
-rw-r--r-- | src/soc/intel/cannonlake/reset.c | 1 | ||||
-rw-r--r-- | src/soc/intel/cannonlake/romstage/romstage.c | 1 |
6 files changed, 0 insertions, 6 deletions
diff --git a/src/soc/intel/cannonlake/chip.c b/src/soc/intel/cannonlake/chip.c index 014805f593..6a3324b7fd 100644 --- a/src/soc/intel/cannonlake/chip.c +++ b/src/soc/intel/cannonlake/chip.c @@ -14,7 +14,6 @@ */ #include <chip.h> -#include <compiler.h> #include <console/console.h> #include <device/device.h> #include <device/pci.h> diff --git a/src/soc/intel/cannonlake/fsp_params.c b/src/soc/intel/cannonlake/fsp_params.c index cbc97b22cd..9befdc8fda 100644 --- a/src/soc/intel/cannonlake/fsp_params.c +++ b/src/soc/intel/cannonlake/fsp_params.c @@ -14,7 +14,6 @@ */ #include <chip.h> -#include <compiler.h> #include <console/console.h> #include <device/device.h> #include <device/pci.h> diff --git a/src/soc/intel/cannonlake/include/soc/nvs.h b/src/soc/intel/cannonlake/include/soc/nvs.h index 1e5562566d..1cb22faa74 100644 --- a/src/soc/intel/cannonlake/include/soc/nvs.h +++ b/src/soc/intel/cannonlake/include/soc/nvs.h @@ -19,7 +19,6 @@ #define _SOC_NVS_H_ #include <commonlib/helpers.h> -#include <compiler.h> #include <vendorcode/google/chromeos/gnvs.h> typedef struct global_nvs_t { diff --git a/src/soc/intel/cannonlake/include/soc/pm.h b/src/soc/intel/cannonlake/include/soc/pm.h index 1494d561d8..1661ece807 100644 --- a/src/soc/intel/cannonlake/include/soc/pm.h +++ b/src/soc/intel/cannonlake/include/soc/pm.h @@ -142,7 +142,6 @@ #include <arch/acpi.h> #include <arch/io.h> -#include <compiler.h> #include <soc/gpe.h> #include <soc/iomap.h> #include <soc/smbus.h> diff --git a/src/soc/intel/cannonlake/reset.c b/src/soc/intel/cannonlake/reset.c index 140fbff6a5..eae94cf6c5 100644 --- a/src/soc/intel/cannonlake/reset.c +++ b/src/soc/intel/cannonlake/reset.c @@ -13,7 +13,6 @@ * GNU General Public License for more details. */ -#include <compiler.h> #include <console/console.h> #include <intelblocks/cse.h> #include <intelblocks/pmclib.h> diff --git a/src/soc/intel/cannonlake/romstage/romstage.c b/src/soc/intel/cannonlake/romstage/romstage.c index 6f610b6eec..246e0eac05 100644 --- a/src/soc/intel/cannonlake/romstage/romstage.c +++ b/src/soc/intel/cannonlake/romstage/romstage.c @@ -19,7 +19,6 @@ #include <chip.h> #include <cpu/x86/mtrr.h> #include <cbmem.h> -#include <compiler.h> #include <console/console.h> #include <fsp/util.h> #include <intelblocks/chip.h> |