diff options
| author | Elyes HAOUAS <ehaouas@noos.fr> | 2018-10-27 09:41:02 +0200 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2018-11-12 09:22:18 +0000 |
| commit | d2b9ec13622d34714b4ecf8b9daf53b32665d3d7 (patch) | |
| tree | 205a6f66c9ece4b05010b0c33a8c174bc954249c /src/soc/intel/cannonlake | |
| parent | a9a1913d4d3f27f681b6ef980f064b57da8c1a68 (diff) | |
src: Remove unneeded include "{arch,cpu}/cpu.h"
Change-Id: I17c4fc4e3e2eeef7c720c6a020b37d8f7a0f57a4
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/29300
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Diffstat (limited to 'src/soc/intel/cannonlake')
| -rw-r--r-- | src/soc/intel/cannonlake/acpi.c | 2 | ||||
| -rw-r--r-- | src/soc/intel/cannonlake/include/soc/cpu.h | 1 | ||||
| -rw-r--r-- | src/soc/intel/cannonlake/include/soc/romstage.h | 1 |
3 files changed, 0 insertions, 4 deletions
diff --git a/src/soc/intel/cannonlake/acpi.c b/src/soc/intel/cannonlake/acpi.c index 4fd92415af..84dfdad286 100644 --- a/src/soc/intel/cannonlake/acpi.c +++ b/src/soc/intel/cannonlake/acpi.c @@ -17,12 +17,10 @@ #include <arch/acpi.h> #include <arch/acpigen.h> -#include <arch/cpu.h> #include <arch/io.h> #include <arch/smp/mpspec.h> #include <cbmem.h> #include <chip.h> -#include <cpu/cpu.h> #include <ec/google/chromeec/ec.h> #include <intelblocks/cpulib.h> #include <intelblocks/pmclib.h> diff --git a/src/soc/intel/cannonlake/include/soc/cpu.h b/src/soc/intel/cannonlake/include/soc/cpu.h index 1e3e2b4cb1..0e027d3456 100644 --- a/src/soc/intel/cannonlake/include/soc/cpu.h +++ b/src/soc/intel/cannonlake/include/soc/cpu.h @@ -17,7 +17,6 @@ #ifndef _SOC_CANNONLAKE_CPU_H_ #define _SOC_CANNONLAKE_CPU_H_ -#include <arch/cpu.h> #include <device/device.h> #include <intelblocks/msr.h> diff --git a/src/soc/intel/cannonlake/include/soc/romstage.h b/src/soc/intel/cannonlake/include/soc/romstage.h index 9ea60ae93e..a58ace59a5 100644 --- a/src/soc/intel/cannonlake/include/soc/romstage.h +++ b/src/soc/intel/cannonlake/include/soc/romstage.h @@ -17,7 +17,6 @@ #ifndef _SOC_ROMSTAGE_H_ #define _SOC_ROMSTAGE_H_ -#include <arch/cpu.h> #include <fsp/api.h> void mainboard_memory_init_params(FSPM_UPD *mupd); |