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authorElyes HAOUAS <ehaouas@noos.fr>2020-06-27 07:17:16 +0200
committerPatrick Georgi <pgeorgi@google.com>2020-06-30 05:58:08 +0000
commitbda27cd336a784d6ac55b2eb8af2635b26545fc4 (patch)
tree0c11a4b0c20cb24d3fbc49f7bc66e07e5e855b6f /src/soc/intel/cannonlake
parente8d230d65d9cba20da77d0c5d200edf40286e09d (diff)
src: Remove whitespaces before tabs
Change-Id: I73695152ec8d8ab2dabf8421ef2405f70de0f4ba Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr> Reviewed-on: https://review.coreboot.org/c/coreboot/+/42795 Reviewed-by: Angel Pons <th3fanbus@gmail.com> Reviewed-by: Frans Hendriks <fhendriks@eltan.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc/intel/cannonlake')
-rw-r--r--src/soc/intel/cannonlake/acpi/scs.asl2
1 files changed, 1 insertions, 1 deletions
diff --git a/src/soc/intel/cannonlake/acpi/scs.asl b/src/soc/intel/cannonlake/acpi/scs.asl
index ae0afc8123..8e1de1e0e1 100644
--- a/src/soc/intel/cannonlake/acpi/scs.asl
+++ b/src/soc/intel/cannonlake/acpi/scs.asl
@@ -82,7 +82,7 @@ Scope (\_SB.PCI0) {
* containing one bit for each function index, starting
* with zero.
* Bit 0 - Indicates whether there is support for any
- * functions other than function 0
+ * functions other than function 0
* Bit 1 - Indicates support to clear power control
* register
* Bit 2 - Indicates support to set power control