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authorKyösti Mälkki <kyosti.malkki@gmail.com>2019-07-12 13:10:19 +0300
committerMartin Roth <martinroth@google.com>2019-07-21 18:58:01 +0000
commit71756c21afd14f4114c597487406eb53e23730b2 (patch)
tree7ccb61cf5eb3a5b3fb3024327fce58d141c4e928 /src/soc/intel/cannonlake
parent6046eb405a4f1cbb4df1ed0d23276f333bc0998b (diff)
soc/intel: Expand SA_DEV_ROOT for ramstage
We do not want to disguise somewhat complex function calls as simple macros. Change-Id: I298f7f9a1c6a64cfba454e919eeaedc7bb2d4801 Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/34411 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Furquan Shaikh <furquan@google.com>
Diffstat (limited to 'src/soc/intel/cannonlake')
-rw-r--r--src/soc/intel/cannonlake/include/soc/pci_devs.h19
-rw-r--r--src/soc/intel/cannonlake/smmrelocate.c3
2 files changed, 10 insertions, 12 deletions
diff --git a/src/soc/intel/cannonlake/include/soc/pci_devs.h b/src/soc/intel/cannonlake/include/soc/pci_devs.h
index 33814b0330..938b09a601 100644
--- a/src/soc/intel/cannonlake/include/soc/pci_devs.h
+++ b/src/soc/intel/cannonlake/include/soc/pci_devs.h
@@ -19,35 +19,32 @@
#include <device/pci_def.h>
-#define _SA_DEVFN(slot) PCI_DEVFN(SA_DEV_SLOT_ ## slot, 0)
#define _PCH_DEVFN(slot, func) PCI_DEVFN(PCH_DEV_SLOT_ ## slot, func)
#if !defined(__SIMPLE_DEVICE__)
#include <device/device.h>
-#define _SA_DEV(slot) pcidev_path_on_root_debug(_SA_DEVFN(slot), __func__)
#define _PCH_DEV(slot, func) pcidev_path_on_root_debug(_PCH_DEVFN(slot, func), __func__)
#else
-#define _SA_DEV(slot) PCI_DEV(0, SA_DEV_SLOT_ ## slot, 0)
#define _PCH_DEV(slot, func) PCI_DEV(0, PCH_DEV_SLOT_ ## slot, func)
#endif
/* System Agent Devices */
#define SA_DEV_SLOT_ROOT 0x00
-#define SA_DEVFN_ROOT _SA_DEVFN(ROOT)
-#define SA_DEV_ROOT _SA_DEV(ROOT)
+#define SA_DEVFN_ROOT PCI_DEVFN(SA_DEV_SLOT_ROOT, 0)
+#define SA_DEV_ROOT PCI_DEV(0, SA_DEV_SLOT_ROOT, 0)
#define SA_DEV_SLOT_IGD 0x02
-#define SA_DEVFN_IGD _SA_DEVFN(IGD)
-#define SA_DEV_IGD _SA_DEV(IGD)
+#define SA_DEVFN_IGD PCI_DEVFN(SA_DEV_SLOT_IGD, 0)
+#define SA_DEV_IGD PCI_DEV(0, SA_DEV_SLOT_IGD, 0)
#define SA_DEV_SLOT_DSP 0x04
-#define SA_DEVFN_DSP _SA_DEVFN(DSP)
-#define SA_DEV_DSP _SA_DEV(DSP)
+#define SA_DEVFN_DSP PCI_DEVFN(SA_DEV_SLOT_DSP, 0)
+#define SA_DEV_DSP PCI_DEV(0, SA_DEV_SLOT_DSP, 0)
#define SA_DEV_SLOT_IPU 0x05
-#define SA_DEVFN_IPU _SA_DEVFN(IPU)
-#define SA_DEV_IPU _SA_DEV(IPU)
+#define SA_DEVFN_IPU PCI_DEVFN(SA_DEV_SLOT_IPU, 0)
+#define SA_DEV_IPU PCI_DEV(0, SA_DEV_SLOT_IPU, 0)
/* PCH Devices */
#define PCH_DEV_SLOT_THERMAL 0x12
diff --git a/src/soc/intel/cannonlake/smmrelocate.c b/src/soc/intel/cannonlake/smmrelocate.c
index 2576c9c1df..980702ffb6 100644
--- a/src/soc/intel/cannonlake/smmrelocate.c
+++ b/src/soc/intel/cannonlake/smmrelocate.c
@@ -301,11 +301,12 @@ void smm_relocate(void)
void smm_lock(void)
{
+ struct device *sa_dev = pcidev_path_on_root(SA_DEVFN_ROOT);
/*
* LOCK the SMM memory window and enable normal SMM.
* After running this function, only a full reset can
* make the SMM registers writable again.
*/
printk(BIOS_DEBUG, "Locking SMM.\n");
- pci_write_config8(SA_DEV_ROOT, SMRAM, D_LCK | G_SMRAME | C_BASE_SEG);
+ pci_write_config8(sa_dev, SMRAM, D_LCK | G_SMRAME | C_BASE_SEG);
}