diff options
| author | Patrick Rudolph <siro@das-labor.org> | 2018-10-01 19:17:11 +0200 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2018-10-22 08:35:32 +0000 |
| commit | f677d17ab3cfd1471c0f238a0d32b0d56dd8d37f (patch) | |
| tree | 9b0c01512de536210262110ac4e7dfb78d6849c1 /src/soc/intel/cannonlake | |
| parent | 45022ae056cdbf58429b77daf2da176306312801 (diff) | |
intel: Use CF9 reset (part 2)
Make use of the common CF9 reset in SOC_INTEL_COMMON_RESET. Also
implement board_reset() as a "full reset" (aka. cold reset) as that
is what was used here for hard_reset().
Drop soc_reset_prepare() thereby, as it was only used for APL. Also,
move the global-reset logic.
We leave some comments to remind us that a system_reset() should
be enough, where a full_reset() is called now (to retain current
behaviour) and looks suspicious.
Note, as no global_reset() is implemented for Denverton-NS, we halt
there now instead of issuing a non-global reset. This seems safer;
a non-global reset might result in a reset loop.
Change-Id: I5e7025c3c9ea6ded18e72037412b60a1df31bd53
Signed-off-by: Nico Huber <nico.h@gmx.de>
Reviewed-on: https://review.coreboot.org/29169
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Diffstat (limited to 'src/soc/intel/cannonlake')
| -rw-r--r-- | src/soc/intel/cannonlake/Kconfig | 1 | ||||
| -rw-r--r-- | src/soc/intel/cannonlake/reset.c | 7 |
2 files changed, 4 insertions, 4 deletions
diff --git a/src/soc/intel/cannonlake/Kconfig b/src/soc/intel/cannonlake/Kconfig index ce830f354b..abe029a194 100644 --- a/src/soc/intel/cannonlake/Kconfig +++ b/src/soc/intel/cannonlake/Kconfig @@ -35,7 +35,6 @@ config CPU_SPECIFIC_OPTIONS select CPU_INTEL_FIRMWARE_INTERFACE_TABLE select GENERIC_GPIO_LIB select HAVE_FSP_GOP - select HAVE_HARD_RESET select INTEL_DESCRIPTOR_MODE_CAPABLE select HAVE_MONOTONIC_TIMER select HAVE_SMI_HANDLER diff --git a/src/soc/intel/cannonlake/reset.c b/src/soc/intel/cannonlake/reset.c index eae94cf6c5..a6f8092908 100644 --- a/src/soc/intel/cannonlake/reset.c +++ b/src/soc/intel/cannonlake/reset.c @@ -13,11 +13,12 @@ * GNU General Public License for more details. */ +#include <cf9_reset.h> #include <console/console.h> #include <intelblocks/cse.h> #include <intelblocks/pmclib.h> #include <fsp/util.h> -#include <reset.h> +#include <soc/intel/common/reset.h> #include <string.h> #include <timer.h> #include <soc/pci_devs.h> @@ -85,7 +86,7 @@ void do_global_reset(void) /* global reset if CSE fail to reset */ pmc_global_reset_enable(1); - hard_reset(); + do_full_reset(); } void chipset_handle_reset(uint32_t status) @@ -93,7 +94,7 @@ void chipset_handle_reset(uint32_t status) switch (status) { case FSP_STATUS_RESET_REQUIRED_3: /* Global Reset */ printk(BIOS_DEBUG, "GLOBAL RESET!!\n"); - do_global_reset(); + global_reset(); break; default: printk(BIOS_ERR, "unhandled reset type %x\n", status); |