soc/intel/gma: Move DDI-A 4-lane config to common code

Change-Id: I0572dbbfb61e5e0129fe6a3a1b5894145d74fd0d
Signed-off-by: Nico Huber <nico.h@gmx.de>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/40728
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>

2 files changed, 3 insertions, 17 deletions

diff --git a/src/soc/intel/cannonlake/Kconfig b/src/soc/intel/cannonlake/Kconfig
index 7a56d0d42d..f06d84b87c 100644
--- a/src/soc/intel/cannonlake/Kconfig
+++ b/src/soc/intel/cannonlake/Kconfig
@@ -25,6 +25,7 @@ config SOC_INTEL_COFFEELAKE
 	select SOC_INTEL_CANNONLAKE_BASE
 	select FSP_USES_CB_STACK
 	select HAVE_INTEL_FSP_REPO
+	select SOC_INTEL_CONFIGURE_DDI_A_4_LANES
 	help
 	  Intel Coffeelake support
 
@@ -33,6 +34,7 @@ config SOC_INTEL_WHISKEYLAKE
 	select SOC_INTEL_CANNONLAKE_BASE
 	select FSP_USES_CB_STACK
 	select HAVE_INTEL_FSP_REPO
+	select SOC_INTEL_CONFIGURE_DDI_A_4_LANES
 	help
 	  Intel Whiskeylake support
 
@@ -41,6 +43,7 @@ config SOC_INTEL_COMETLAKE
 	select SOC_INTEL_CANNONLAKE_BASE
 	select FSP_USES_CB_STACK
 	select HAVE_INTEL_FSP_REPO
+	select SOC_INTEL_CONFIGURE_DDI_A_4_LANES
 	help
 	  Intel Cometlake support
 
diff --git a/src/soc/intel/cannonlake/graphics.c b/src/soc/intel/cannonlake/graphics.c
index cd5e773dbb..5fbe0d53a3 100644
--- a/src/soc/intel/cannonlake/graphics.c
+++ b/src/soc/intel/cannonlake/graphics.c
@@ -11,20 +11,3 @@ uintptr_t fsp_soc_get_igd_bar(void)
 {
 	return graphics_get_memory_base();
 }
-
-void graphics_soc_init(struct device *dev)
-{
-	uint32_t ddi_buf_ctl;
-
-	/*
-	 * Enable DDI-A (eDP) 4-lane operation if the link is not up yet.
-	 * This will allow the kernel to use 4-lane eDP links properly
-	 * if the VBIOS or GOP driver do not execute.
-	 */
-	ddi_buf_ctl = graphics_gtt_read(DDI_BUF_CTL_A);
-	if (!acpi_is_wakeup_s3() && !(ddi_buf_ctl & DDI_BUF_CTL_ENABLE)) {
-		ddi_buf_ctl |= (DDI_A_4_LANES | DDI_INIT_DISPLAY_DETECTED |
-				DDI_BUF_IS_IDLE);
-		graphics_gtt_write(DDI_BUF_CTL_A, ddi_buf_ctl);
-	}
-}