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authorFelix Singer <felixsinger@posteo.net>2022-12-16 07:54:16 +0100
committerFelix Singer <felixsinger@posteo.net>2022-12-23 10:18:55 +0000
commitd25277666829d7ed9897598d3ed46fdee0613106 (patch)
treea8aa22ed086730113ae0fefb2584fb0f424cc5c4 /src/soc/intel/cannonlake
parent35e65a8bc36628baad7d2ed94bef7619971e6d88 (diff)
tree: Replace And(a,b) with ASL 2.0 syntax
Replace `And (a, b)` with `a & b`. Change-Id: Id8bbd1a477e6286bbcb5fa31afd1c7a860b1c7dc Signed-off-by: Felix Singer <felixsinger@posteo.net> Reviewed-on: https://review.coreboot.org/c/coreboot/+/70851 Reviewed-by: Eric Lai <eric_lai@quanta.corp-partner.google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc/intel/cannonlake')
-rw-r--r--src/soc/intel/cannonlake/acpi/gpio.asl2
1 files changed, 1 insertions, 1 deletions
diff --git a/src/soc/intel/cannonlake/acpi/gpio.asl b/src/soc/intel/cannonlake/acpi/gpio.asl
index 6b2e2fcd50..5ae7f74668 100644
--- a/src/soc/intel/cannonlake/acpi/gpio.asl
+++ b/src/soc/intel/cannonlake/acpi/gpio.asl
@@ -140,7 +140,7 @@ Method (CGPM, 2, Serialized)
/* Mask off current PM bits */
PCRA (Local0, GPIO_MISCCFG, Not (MISCCFG_GPIO_PM_CONFIG_BITS))
/* Mask in requested bits */
- PCRO (Local0, GPIO_MISCCFG, And (Arg1, MISCCFG_GPIO_PM_CONFIG_BITS))
+ PCRO (Local0, GPIO_MISCCFG, Arg1 & MISCCFG_GPIO_PM_CONFIG_BITS)
}
}