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authorNico Huber <nico.huber@secunet.com>2021-07-26 13:44:19 +0000
committerFelix Singer <service+coreboot-gerrit@felixsinger.de>2024-01-24 07:59:18 +0000
commit792ed6353a80fcebbc74f8a34e37c10eaf6ff62b (patch)
treeb00fee6b2195d4f14f288fb76cbc0945a5c1e8ff /src/soc/intel/cannonlake
parent0030349e2deab5f4041745ec8474e03b7e5c329e (diff)
soc/intel/cannonlake: Report correct latencies for C states
The C_STATE_LATENCY_FROM_LAT_REG() macro uses values that we also write into the respective MSRs in configure_c_states(). Match the indices to those used there. Change-Id: Ie01a53d6f06bc02a53d95e390e16e9963f4c65ee Signed-off-by: Nico Huber <nico.huber@secunet.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/80167 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Matt DeVillier <matt.devillier@gmail.com>
Diffstat (limited to 'src/soc/intel/cannonlake')
-rw-r--r--src/soc/intel/cannonlake/acpi.c18
1 files changed, 9 insertions, 9 deletions
diff --git a/src/soc/intel/cannonlake/acpi.c b/src/soc/intel/cannonlake/acpi.c
index 1545d19b5e..1bd81c4af8 100644
--- a/src/soc/intel/cannonlake/acpi.c
+++ b/src/soc/intel/cannonlake/acpi.c
@@ -53,47 +53,47 @@ static const acpi_cstate_t cstate_map[NUM_C_STATES] = {
.resource = MWAIT_RES(0, 1),
},
[C_STATE_C6_SHORT_LAT] = {
- .latency = C_STATE_LATENCY_FROM_LAT_REG(0),
+ .latency = C_STATE_LATENCY_FROM_LAT_REG(1),
.power = C6_POWER,
.resource = MWAIT_RES(2, 0),
},
[C_STATE_C6_LONG_LAT] = {
- .latency = C_STATE_LATENCY_FROM_LAT_REG(0),
+ .latency = C_STATE_LATENCY_FROM_LAT_REG(2),
.power = C6_POWER,
.resource = MWAIT_RES(2, 1),
},
[C_STATE_C7_SHORT_LAT] = {
- .latency = C_STATE_LATENCY_FROM_LAT_REG(0),
+ .latency = C_STATE_LATENCY_FROM_LAT_REG(1),
.power = C7_POWER,
.resource = MWAIT_RES(3, 0),
},
[C_STATE_C7_LONG_LAT] = {
- .latency = C_STATE_LATENCY_FROM_LAT_REG(0),
+ .latency = C_STATE_LATENCY_FROM_LAT_REG(2),
.power = C7_POWER,
.resource = MWAIT_RES(3, 1),
},
[C_STATE_C7S_SHORT_LAT] = {
- .latency = C_STATE_LATENCY_FROM_LAT_REG(0),
+ .latency = C_STATE_LATENCY_FROM_LAT_REG(1),
.power = C7_POWER,
.resource = MWAIT_RES(3, 2),
},
[C_STATE_C7S_LONG_LAT] = {
- .latency = C_STATE_LATENCY_FROM_LAT_REG(0),
+ .latency = C_STATE_LATENCY_FROM_LAT_REG(2),
.power = C7_POWER,
.resource = MWAIT_RES(3, 3),
},
[C_STATE_C8] = {
- .latency = C_STATE_LATENCY_FROM_LAT_REG(0),
+ .latency = C_STATE_LATENCY_FROM_LAT_REG(3),
.power = C8_POWER,
.resource = MWAIT_RES(4, 0),
},
[C_STATE_C9] = {
- .latency = C_STATE_LATENCY_FROM_LAT_REG(0),
+ .latency = C_STATE_LATENCY_FROM_LAT_REG(4),
.power = C9_POWER,
.resource = MWAIT_RES(5, 0),
},
[C_STATE_C10] = {
- .latency = C_STATE_LATENCY_FROM_LAT_REG(0),
+ .latency = C_STATE_LATENCY_FROM_LAT_REG(5),
.power = C10_POWER,
.resource = MWAIT_RES(6, 0),
},