diff options
| author | Subrata Banik <subrata.banik@intel.com> | 2019-04-10 12:19:27 +0530 |
|---|---|---|
| committer | Subrata Banik <subrata.banik@intel.com> | 2019-04-13 03:25:46 +0000 |
| commit | 6d569163ab680ca436b16c040e6840e969df6c61 (patch) | |
| tree | 677711347a1daa7aad787b0f57b1a2deacb5ae1f /src/soc/intel/cannonlake | |
| parent | 459df6697a150e0be5dd0378d98ef54eff520641 (diff) | |
soc/intel/cpulib: Remove redundent enable/disable functions
This patch removes multiple enable/disable function definitions and
make use of single function with argument to know feature status
(enable/disable).
Change-Id: I502cd2497b07e9de062df453ecbb9c11df692f5a
Signed-off-by: Subrata Banik <subrata.banik@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/32282
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-by: Lijian Zhao <lijian.zhao@intel.com>
Reviewed-by: Duncan Laurie <dlaurie@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc/intel/cannonlake')
| -rw-r--r-- | src/soc/intel/cannonlake/cpu.c | 6 |
1 files changed, 2 insertions, 4 deletions
diff --git a/src/soc/intel/cannonlake/cpu.c b/src/soc/intel/cannonlake/cpu.c index 7c06d25fd7..01386dd022 100644 --- a/src/soc/intel/cannonlake/cpu.c +++ b/src/soc/intel/cannonlake/cpu.c @@ -269,10 +269,8 @@ static void configure_misc(void) msr = rdmsr(IA32_MISC_ENABLE); msr.lo |= (1 << 0); /* Fast String enable */ msr.lo |= (1 << 3); /* TM1/TM2/EMTTM enable */ - if (conf && conf->eist_enable) - cpu_enable_eist(); - else - cpu_disable_eist(); + /* Set EIST status */ + cpu_set_eist(conf->eist_enable); wrmsr(IA32_MISC_ENABLE, msr); /* Disable Thermal interrupts */ |