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authorBora Guvendik <bora.guvendik@intel.com>2017-11-22 13:48:12 -0800
committerAaron Durbin <adurbin@chromium.org>2018-02-16 03:59:29 +0000
commit3f672323b5f5cd6eaf955a31ebd0f73685f1d257 (patch)
treec619cda6d614a0c37c873a8fe52d68f0439592eb /src/soc/intel/cannonlake
parent7e2fe06a46ad3c44b1eb77651c27d4b9166033a6 (diff)
soc/intel/common/block/gpio: Change group offset calculation
Add group information for each gpio community and use it to calculate offset of a pad within its group. Original implementation assumed that the number of gpios in each group is same but that lead to a bug for cnl since numbers differ for each group. BUG=b:69616750 TEST=Need to test again on SKL,CNL,APL,GLK Change-Id: I02ab1d878bc83d32222be074bd2db5e23adaf580 Signed-off-by: Bora Guvendik <bora.guvendik@intel.com> Reviewed-on: https://review.coreboot.org/22571 Reviewed-by: Lijian Zhao <lijian.zhao@intel.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Diffstat (limited to 'src/soc/intel/cannonlake')
-rw-r--r--src/soc/intel/cannonlake/gpio.c40
1 files changed, 40 insertions, 0 deletions
diff --git a/src/soc/intel/cannonlake/gpio.c b/src/soc/intel/cannonlake/gpio.c
index cf10e4940f..0befba0b02 100644
--- a/src/soc/intel/cannonlake/gpio.c
+++ b/src/soc/intel/cannonlake/gpio.c
@@ -32,6 +32,36 @@ static const struct reset_mapping rst_map_com0[] = {
{ .logical = PAD_CFG0_LOGICAL_RESET_RSMRST, .chipset = 3U << 30 },
};
+static const struct pad_group cnl_community0_groups[] = {
+ INTEL_GPP(GPP_A0, GPP_A0, GPIO_RSVD_0), /* GPP_A */
+ INTEL_GPP(GPP_A0, GPP_B0, GPIO_RSVD_2), /* GPP_B */
+ INTEL_GPP(GPP_A0, GPP_G0, GPP_G7), /* GPP_G */
+ INTEL_GPP(GPP_A0, GPIO_RSVD_3, GPIO_RSVD_11), /* SPI */
+};
+
+static const struct pad_group cnl_community1_groups[] = {
+ INTEL_GPP(GPP_D0, GPP_D0, GPIO_RSVD_12), /* GPP_D */
+ INTEL_GPP(GPP_D0, GPP_F0, GPP_F23), /* GPP_F */
+ INTEL_GPP(GPP_D0, GPP_H0, GPP_H23), /* GPP_H */
+ INTEL_GPP(GPP_D0, GPIO_RSVD_12, GPIO_RSVD_52), /* VGPIO */
+};
+
+static const struct pad_group cnl_community2_groups[] = {
+ INTEL_GPP(GPD0, GPD0, GPD11), /* GPD */
+};
+
+static const struct pad_group cnl_community3_groups[] = {
+ INTEL_GPP(HDA_BCLK, HDA_BCLK, SSP1_TXD), /* AZA */
+ INTEL_GPP(HDA_BCLK, GPIO_RSVD_68, GPIO_RSVD_78), /* CPU */
+};
+
+static const struct pad_group cnl_community4_groups[] = {
+ INTEL_GPP(GPP_C0, GPP_C0, GPP_C23), /* GPP_C */
+ INTEL_GPP(GPP_C0, GPP_E0, GPP_E23), /* GPP_E */
+ INTEL_GPP(GPP_C0, GPIO_RSVD_53, GPIO_RSVD_61), /* JTAG */
+ INTEL_GPP(GPP_C0, GPIO_RSVD_62, GPIO_RSVD_67), /* HVMOS */
+};
+
static const struct pad_community cnl_communities[] = {
{ /* GPP A, B, G, SPI */
.port = PID_GPIOCOM0,
@@ -47,6 +77,8 @@ static const struct pad_community cnl_communities[] = {
.acpi_path = "\\_SB.PCI0.GPIO",
.reset_map = rst_map_com0,
.num_reset_vals = ARRAY_SIZE(rst_map_com0),
+ .groups = cnl_community0_groups,
+ .num_groups = ARRAY_SIZE(cnl_community0_groups),
}, { /* GPP D, F, H, VGPIO */
.port = PID_GPIOCOM1,
.first_pad = GPP_D0,
@@ -61,6 +93,8 @@ static const struct pad_community cnl_communities[] = {
.acpi_path = "\\_SB.PCI0.GPIO",
.reset_map = rst_map,
.num_reset_vals = ARRAY_SIZE(rst_map),
+ .groups = cnl_community1_groups,
+ .num_groups = ARRAY_SIZE(cnl_community1_groups),
}, { /* GPD */
.port = PID_GPIOCOM2,
.first_pad = GPD0,
@@ -75,6 +109,8 @@ static const struct pad_community cnl_communities[] = {
.acpi_path = "\\_SB.PCI0.GPIO",
.reset_map = rst_map,
.num_reset_vals = ARRAY_SIZE(rst_map),
+ .groups = cnl_community2_groups,
+ .num_groups = ARRAY_SIZE(cnl_community2_groups),
}, { /* AZA, CPU */
.port = PID_GPIOCOM3,
.first_pad = HDA_BCLK,
@@ -89,6 +125,8 @@ static const struct pad_community cnl_communities[] = {
.acpi_path = "\\_SB.PCI0.GPIO",
.reset_map = rst_map,
.num_reset_vals = ARRAY_SIZE(rst_map),
+ .groups = cnl_community3_groups,
+ .num_groups = ARRAY_SIZE(cnl_community3_groups),
}, { /* GPP C, E, JTAG, HVMOS */
.port = PID_GPIOCOM4,
.first_pad = GPP_C0,
@@ -103,6 +141,8 @@ static const struct pad_community cnl_communities[] = {
.acpi_path = "\\_SB.PCI0.GPIO",
.reset_map = rst_map,
.num_reset_vals = ARRAY_SIZE(rst_map),
+ .groups = cnl_community4_groups,
+ .num_groups = ARRAY_SIZE(cnl_community4_groups),
}
};