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authorCoolStar <coolstarorganization@gmail.com>2024-02-23 12:09:22 -0800
committerMatt DeVillier <matt.devillier@gmail.com>2024-02-27 20:41:22 +0000
commit377845a9d4f306082b8fcce3802f0d5e880647f3 (patch)
tree3b4c49c1fd14253b38d71d4f2b93f194d94f2afa /src/soc/intel/cannonlake
parent9bbfafbef89aef741e123349d5f2e1100eefd154 (diff)
soc/intel/tigerlake: Fix processor hang while plug unplug of TBT device
Port 9c348a7b7ea3 ("soc/intel/alderlake: Fix processor hang while plug unplug of TBT device") from Alder Lake to fix a similar issue present on Tiger Lake: > Processor hang is observed while hot plug unplug of TBT device. BIOS > should execute TBT PCIe RP RTD3 flow based on the value of > TBT_DMA_CFG_VS_CAP_9[30]. It should skip TBT PCIe RP RTD3 flow, if > BIT30 in TBT FW version is not set. > BUG=b:194880254 > https://review.coreboot.org/c/coreboot/+/56503 Change-Id: Ie5409111d4239be86c0b153f01b4fe5fc6af352c Signed-off-by: CoolStar <coolstarorganization@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/80718 Reviewed-by: Matt DeVillier <matt.devillier@gmail.com> Reviewed-by: Paul Menzel <paulepanter@mailbox.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
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