diff options
author | Elyes HAOUAS <ehaouas@noos.fr> | 2020-08-19 21:42:14 +0200 |
---|---|---|
committer | Michael Niewöhner <foss@mniewoehner.de> | 2020-09-21 16:15:25 +0000 |
commit | 2854f40668f37c09c5afa5e7ac670adfaacb44b4 (patch) | |
tree | 2c518c284f486a4c68b2babe10d55779c61cc7d5 /src/soc/intel/cannonlake | |
parent | ee65079c9657f8e1f8ac1ea3d562b531368eecb7 (diff) |
src/soc/intel: Drop unneeded empty lines
Change-Id: Id93aab5630e928ee4d7e957801e15a4cc8739fae
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/44594
Reviewed-by: Michael Niewöhner <foss@mniewoehner.de>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc/intel/cannonlake')
-rw-r--r-- | src/soc/intel/cannonlake/bootblock/pch.c | 1 | ||||
-rw-r--r-- | src/soc/intel/cannonlake/chip.h | 1 | ||||
-rw-r--r-- | src/soc/intel/cannonlake/fsp_params.c | 1 | ||||
-rw-r--r-- | src/soc/intel/cannonlake/include/soc/pch.h | 1 | ||||
-rw-r--r-- | src/soc/intel/cannonlake/include/soc/sata.h | 1 | ||||
-rw-r--r-- | src/soc/intel/cannonlake/include/soc/usb.h | 1 | ||||
-rw-r--r-- | src/soc/intel/cannonlake/smmrelocate.c | 1 | ||||
-rw-r--r-- | src/soc/intel/cannonlake/vr_config.c | 4 |
8 files changed, 0 insertions, 11 deletions
diff --git a/src/soc/intel/cannonlake/bootblock/pch.c b/src/soc/intel/cannonlake/bootblock/pch.c index e1f054857a..242aa71141 100644 --- a/src/soc/intel/cannonlake/bootblock/pch.c +++ b/src/soc/intel/cannonlake/bootblock/pch.c @@ -89,7 +89,6 @@ void bootblock_pch_early_init(void) soc_config_pwrmbase(); } - static void soc_config_acpibase(void) { uint32_t pmc_reg_value; diff --git a/src/soc/intel/cannonlake/chip.h b/src/soc/intel/cannonlake/chip.h index 6a083c63fc..69a2cf2f48 100644 --- a/src/soc/intel/cannonlake/chip.h +++ b/src/soc/intel/cannonlake/chip.h @@ -113,7 +113,6 @@ struct soc_intel_cannonlake_config { SaGv_Enabled, } SaGv; - /* Rank Margin Tool. 1:Enable, 0:Disable */ uint8_t RMT; diff --git a/src/soc/intel/cannonlake/fsp_params.c b/src/soc/intel/cannonlake/fsp_params.c index b4f790483f..33f3645928 100644 --- a/src/soc/intel/cannonlake/fsp_params.c +++ b/src/soc/intel/cannonlake/fsp_params.c @@ -370,7 +370,6 @@ void platform_fsp_silicon_init_params_cb(FSPS_UPD *supd) params->PcieRpAspm[i] = config->PcieRpAspm[i] - 1; }; - /* eMMC and SD */ dev = pcidev_path_on_root(PCH_DEVFN_EMMC); if (!dev) diff --git a/src/soc/intel/cannonlake/include/soc/pch.h b/src/soc/intel/cannonlake/include/soc/pch.h index 778b26981b..0fbb98533a 100644 --- a/src/soc/intel/cannonlake/include/soc/pch.h +++ b/src/soc/intel/cannonlake/include/soc/pch.h @@ -3,7 +3,6 @@ #ifndef _SOC_CANNONLAKE_PCH_H_ #define _SOC_CANNONLAKE_PCH_H_ - #define PCH_H 1 #define PCH_LP 2 #define PCH_UNKNOWN_SERIES 0xFF diff --git a/src/soc/intel/cannonlake/include/soc/sata.h b/src/soc/intel/cannonlake/include/soc/sata.h index 869e44ce23..60366be10e 100644 --- a/src/soc/intel/cannonlake/include/soc/sata.h +++ b/src/soc/intel/cannonlake/include/soc/sata.h @@ -1,6 +1,5 @@ /* SPDX-License-Identifier: GPL-2.0-only */ - #ifndef _SOC_SATA_H_ #define _SOC_SATA_H_ diff --git a/src/soc/intel/cannonlake/include/soc/usb.h b/src/soc/intel/cannonlake/include/soc/usb.h index ce87b4ae54..66b3f8b07c 100644 --- a/src/soc/intel/cannonlake/include/soc/usb.h +++ b/src/soc/intel/cannonlake/include/soc/usb.h @@ -1,6 +1,5 @@ /* SPDX-License-Identifier: GPL-2.0-only */ - #ifndef _SOC_USB_H_ #define _SOC_USB_H_ diff --git a/src/soc/intel/cannonlake/smmrelocate.c b/src/soc/intel/cannonlake/smmrelocate.c index 3aec51b216..05bd1f7730 100644 --- a/src/soc/intel/cannonlake/smmrelocate.c +++ b/src/soc/intel/cannonlake/smmrelocate.c @@ -19,7 +19,6 @@ #include <soc/systemagent.h> #include "chip.h" - static void update_save_state(int cpu, uintptr_t curr_smbase, uintptr_t staggered_smbase, struct smm_relocation_params *relo_params) diff --git a/src/soc/intel/cannonlake/vr_config.c b/src/soc/intel/cannonlake/vr_config.c index 13fa7348c4..2b621f7763 100644 --- a/src/soc/intel/cannonlake/vr_config.c +++ b/src/soc/intel/cannonlake/vr_config.c @@ -322,7 +322,6 @@ static const struct vr_lookup vr_config_icc[] = { VR_REFITEM_ICC(PCI_DEVICE_ID_INTEL_CML_S_G0G1_P0P1_6_2), }; - VR_CONFIG_LL(PCI_DEVICE_ID_INTEL_CNL_ID_U) { { 0, value_not_set, VR_CFG_ALL_DOMAINS_LOADLINE(10.3, 2.4, 2.0, 2.0) }, }; @@ -442,8 +441,6 @@ static const struct vr_lookup vr_config_ll[] = { VR_REFITEM_LL(PCI_DEVICE_ID_INTEL_CML_S_G0G1_P0P1_6_2), }; - - VR_CONFIG_TDC(PCI_DEVICE_ID_INTEL_CFL_ID_S) { { 58, value_not_set, VR_CFG_ALL_DOMAINS_TDC(10, 33, 30, 30) }, { 54, value_not_set, VR_CFG_ALL_DOMAINS_TDC(10, 31, 30, 30) }, @@ -557,7 +554,6 @@ static const struct vr_lookup vr_config_tdc[] = { VR_REFITEM_TDC(PCI_DEVICE_ID_INTEL_CML_S_G0G1_P0P1_6_2), }; - static uint16_t get_sku_voltagelimit(int domain) { return 1520; |