diff options
| author | Felix Singer <felixsinger@posteo.net> | 2020-04-22 00:14:44 +0200 |
|---|---|---|
| committer | Nico Huber <nico.h@gmx.de> | 2020-04-28 14:39:34 +0000 |
| commit | 007faee9486bcc24e1bc7011717ae88d7eb5e62b (patch) | |
| tree | 354b64d860779b715bf821fe047719ef511d0d32 /src/soc/intel/cannonlake | |
| parent | d1e0a466d387dc97aae53282c3b4827264993225 (diff) | |
soc/intel/cometlake: Add ucode from repo
On Comet Lake, add the following microcode updates from the 3rdparty
repository:
- 06-8e-0c (CPUID signature: 0x806ec)
- 06-a6-00 (CPUID signature: 0xa0660)
Tested with Clevo N141CU.
Signed-off-by: Felix Singer <felixsinger@posteo.net>
Change-Id: Id10b013df8ce98a4e9830782570e20fbcfad05c1
Reviewed-on: https://review.coreboot.org/c/coreboot/+/40580
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Nico Huber <nico.h@gmx.de>
Diffstat (limited to 'src/soc/intel/cannonlake')
| -rw-r--r-- | src/soc/intel/cannonlake/Kconfig | 1 | ||||
| -rw-r--r-- | src/soc/intel/cannonlake/Makefile.inc | 6 |
2 files changed, 5 insertions, 2 deletions
diff --git a/src/soc/intel/cannonlake/Kconfig b/src/soc/intel/cannonlake/Kconfig index 9bd57a353e..6a86576c2b 100644 --- a/src/soc/intel/cannonlake/Kconfig +++ b/src/soc/intel/cannonlake/Kconfig @@ -39,7 +39,6 @@ config SOC_INTEL_WHISKEYLAKE config SOC_INTEL_COMETLAKE bool select SOC_INTEL_CANNONLAKE_BASE - select MICROCODE_BLOB_UNDISCLOSED select FSP_USES_CB_STACK select HAVE_INTEL_FSP_REPO help diff --git a/src/soc/intel/cannonlake/Makefile.inc b/src/soc/intel/cannonlake/Makefile.inc index c744e9953d..e0605817ae 100644 --- a/src/soc/intel/cannonlake/Makefile.inc +++ b/src/soc/intel/cannonlake/Makefile.inc @@ -108,7 +108,11 @@ else ifeq ($(CONFIG_SOC_INTEL_WHISKEYLAKE),y) cpu_microcode_bins += 3rdparty/intel-microcode/intel-ucode/06-8e-0b cpu_microcode_bins += 3rdparty/intel-microcode/intel-ucode/06-8e-0c else ifeq ($(CONFIG_SOC_INTEL_COMETLAKE),y) -# TODO +ifneq ($(CONFIG_SOC_INTEL_CANNONLAKE_PCH_H),y) +# Missing 06-a6-01 +cpu_microcode_bins += 3rdparty/intel-microcode/intel-ucode/06-8e-0c +cpu_microcode_bins += 3rdparty/intel-microcode/intel-ucode/06-a6-00 +endif endif CPPFLAGS_common += -I$(src)/soc/intel/cannonlake |