soc/{amd,intel}/chip: Use local include for chip.h

Change-Id: Ic1fcbf4b54b7d0b5cda04ca9f7fc145050c867b8
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/32014
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Nico Huber <nico.h@gmx.de>

11 files changed, 22 insertions, 11 deletions

diff --git a/src/soc/intel/cannonlake/acpi.c b/src/soc/intel/cannonlake/acpi.c
index 19469dc94f..209e7c52d4 100644
--- a/src/soc/intel/cannonlake/acpi.c
+++ b/src/soc/intel/cannonlake/acpi.c
@@ -19,7 +19,6 @@
 #include <arch/acpigen.h>
 #include <arch/smp/mpspec.h>
 #include <cbmem.h>
-#include <chip.h>
 #include <console/console.h>
 #include <device/mmio.h>
 #include <device/pci_ops.h>
@@ -38,6 +37,8 @@
 #include <vendorcode/google/chromeos/gnvs.h>
 #include <wrdd.h>
 
+#include "chip.h"
+
 /*
  * List of supported C-states in this processor.
  */
diff --git a/src/soc/intel/cannonlake/chip.c b/src/soc/intel/cannonlake/chip.c
index 845e9ef34f..1bd34c34e0 100644
--- a/src/soc/intel/cannonlake/chip.c
+++ b/src/soc/intel/cannonlake/chip.c
@@ -13,7 +13,6 @@
  * GNU General Public License for more details.
  */
 
-#include <chip.h>
 #include <device/device.h>
 #include <device/pci.h>
 #include <fsp/api.h>
@@ -27,6 +26,8 @@
 #include <soc/pci_devs.h>
 #include <soc/ramstage.h>
 
+#include "chip.h"
+
 #if CONFIG(HAVE_ACPI_TABLES)
 const char *soc_acpi_name(const struct device *dev)
 {
diff --git a/src/soc/intel/cannonlake/cpu.c b/src/soc/intel/cannonlake/cpu.c
index 34b7891ea8..8552424749 100644
--- a/src/soc/intel/cannonlake/cpu.c
+++ b/src/soc/intel/cannonlake/cpu.c
@@ -16,7 +16,6 @@
 #include <arch/cpu.h>
 #include <console/console.h>
 #include <device/pci.h>
-#include <chip.h>
 #include <cpu/x86/lapic.h>
 #include <cpu/x86/mp.h>
 #include <cpu/x86/msr.h>
@@ -35,6 +34,8 @@
 #include <cpu/intel/microcode.h>
 #include <cpu/intel/common/common.h>
 
+#include "chip.h"
+
 /* Convert time in seconds to POWER_LIMIT_1_TIME MSR value */
 static const u8 power_limit_time_sec_to_msr[] = {
 	[0]   = 0x00,
diff --git a/src/soc/intel/cannonlake/finalize.c b/src/soc/intel/cannonlake/finalize.c
index e334555ac0..4dfd15bc4a 100644
--- a/src/soc/intel/cannonlake/finalize.c
+++ b/src/soc/intel/cannonlake/finalize.c
@@ -17,7 +17,6 @@
 #include <arch/io.h>
 #include <device/mmio.h>
 #include <bootstate.h>
-#include <chip.h>
 #include <console/console.h>
 #include <console/post_codes.h>
 #include <cpu/x86/smm.h>
@@ -35,6 +34,8 @@
 #include <soc/systemagent.h>
 #include <stdlib.h>
 
+#include "chip.h"
+
 #define CAMERA1_CLK		0x8000 /* Camera 1 Clock */
 #define CAMERA2_CLK		0x8080 /* Camera 2 Clock */
 #define CAM_CLK_EN		(1 << 1)
diff --git a/src/soc/intel/cannonlake/fsp_params.c b/src/soc/intel/cannonlake/fsp_params.c
index 2b83275df1..61d2520693 100644
--- a/src/soc/intel/cannonlake/fsp_params.c
+++ b/src/soc/intel/cannonlake/fsp_params.c
@@ -13,7 +13,6 @@
  * GNU General Public License for more details.
  */
 
-#include <chip.h>
 #include <console/console.h>
 #include <device/device.h>
 #include <device/pci.h>
@@ -25,6 +24,8 @@
 #include <soc/ramstage.h>
 #include <string.h>
 
+#include "chip.h"
+
 static const int serial_io_dev[] = {
 	PCH_DEVFN_I2C0,
 	PCH_DEVFN_I2C1,
diff --git a/src/soc/intel/cannonlake/include/soc/ramstage.h b/src/soc/intel/cannonlake/include/soc/ramstage.h
index 4a96185e6b..486839852c 100644
--- a/src/soc/intel/cannonlake/include/soc/ramstage.h
+++ b/src/soc/intel/cannonlake/include/soc/ramstage.h
@@ -17,11 +17,12 @@
 #ifndef _SOC_RAMSTAGE_H_
 #define _SOC_RAMSTAGE_H_
 
-#include <chip.h>
 #include <device/device.h>
 #include <fsp/api.h>
 #include <fsp/util.h>
 
+#include "../../chip.h"
+
 void mainboard_silicon_init_params(FSP_S_CONFIG *params);
 void soc_init_pre_device(void *chip_info);
 
diff --git a/src/soc/intel/cannonlake/memmap.c b/src/soc/intel/cannonlake/memmap.c
index b2dd26dcf0..3512e2c4b4 100644
--- a/src/soc/intel/cannonlake/memmap.c
+++ b/src/soc/intel/cannonlake/memmap.c
@@ -16,7 +16,6 @@
 
 #include <arch/ebda.h>
 #include <cbmem.h>
-#include <chip.h>
 #include <console/console.h>
 #include <device/device.h>
 #include <device/pci.h>
@@ -28,6 +27,8 @@
 #include <soc/systemagent.h>
 #include <stdlib.h>
 
+#include "chip.h"
+
 void smm_region(void **start, size_t *size)
 {
 	*start = (void *)sa_get_tseg_base();
diff --git a/src/soc/intel/cannonlake/pmc.c b/src/soc/intel/cannonlake/pmc.c
index 5cd31f9f97..6834aa2d17 100644
--- a/src/soc/intel/cannonlake/pmc.c
+++ b/src/soc/intel/cannonlake/pmc.c
@@ -16,7 +16,6 @@
  */
 
 #include <bootstate.h>
-#include <chip.h>
 #include <console/console.h>
 #include <device/mmio.h>
 #include <device/device.h>
@@ -27,6 +26,8 @@
 #include <soc/pci_devs.h>
 #include <soc/pm.h>
 
+#include "chip.h"
+
 /*
  * Set which power state system will be after reapplying
  * the power (from G3 State)
diff --git a/src/soc/intel/cannonlake/romstage/fsp_params.c b/src/soc/intel/cannonlake/romstage/fsp_params.c
index ce5863855e..c71e4b551a 100644
--- a/src/soc/intel/cannonlake/romstage/fsp_params.c
+++ b/src/soc/intel/cannonlake/romstage/fsp_params.c
@@ -14,7 +14,6 @@
  */
 
 #include <assert.h>
-#include <chip.h>
 #include <cpu/x86/msr.h>
 #include <console/console.h>
 #include <fsp/util.h>
@@ -25,6 +24,8 @@
 #include <soc/romstage.h>
 #include <vendorcode/google/chromeos/chromeos.h>
 
+#include "../chip.h"
+
 static void soc_memory_init_params(FSP_M_CONFIG *m_cfg, const config_t *config)
 {
 	unsigned int i;
diff --git a/src/soc/intel/cannonlake/romstage/romstage.c b/src/soc/intel/cannonlake/romstage/romstage.c
index c168da9a38..661c98a466 100644
--- a/src/soc/intel/cannonlake/romstage/romstage.c
+++ b/src/soc/intel/cannonlake/romstage/romstage.c
@@ -13,7 +13,6 @@
  * GNU General Public License for more details.
  */
 
-#include <chip.h>
 #include <cpu/x86/mtrr.h>
 #include <cbmem.h>
 #include <console/console.h>
@@ -30,6 +29,8 @@
 #include <string.h>
 #include <timestamp.h>
 
+#include "../chip.h"
+
 #define FSP_SMBIOS_MEMORY_INFO_GUID	\
 {	\
 	0xd4, 0x71, 0x20, 0x9b, 0x54, 0xb0, 0x0c, 0x4e,	\
diff --git a/src/soc/intel/cannonlake/smihandler.c b/src/soc/intel/cannonlake/smihandler.c
index 643fad645f..9af291700b 100644
--- a/src/soc/intel/cannonlake/smihandler.c
+++ b/src/soc/intel/cannonlake/smihandler.c
@@ -15,7 +15,6 @@
  * GNU General Public License for more details.
  */
 
-#include <chip.h>
 #include <console/console.h>
 #include <device/pci_def.h>
 #include <intelblocks/fast_spi.h>
@@ -27,6 +26,8 @@
 #include <soc/pcr_ids.h>
 #include <soc/pm.h>
 
+#include "chip.h"
+
 #define CSME0_FBE	0xf
 #define CSME0_BAR	0x0
 #define CSME0_FID	0xb0